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Linux/BEAGLEBK: 1-wire implementation

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Part Number: BEAGLEBK

Tool/software: Linux

i supposed to implement one wire communication between beaglebone(as master) and controller(as slave)

after adding dtb file from command line can i check slave device is connected or not if it is DS series it will show but am using other controller as slave so how can i check 

any suggession


Linux/OMAP-L138: DSPLink incompatible with ProcessorSDK 05_03_00_07

TMDSCSK8127: TMDSCSK8127 /sys/kernel/debug/pm_debug folder

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Part Number: TMDSCSK8127

I work with TMDSCSK8127 board

Using DM8127 IPNC RDK Release (v3.9.1)

At TI81XX PSP PM SUSPEND RESUME User Guide I see the next:

To turn off power domains with power switches if they are idle(no clock is active) during suspend enable following
flag:
$echo 1 > /sys/kernel/debug/pm_debug/turnoff_idle_powerdomains
To disable this:
$echo 0 > /sys/kernel/debug/pm_debug/turnoff_idle_powerdomains

But my target filesystem doesnt have the /sys/kernel/debug/pm_debug folder

It s just has  /sys/kernel/debug folder and this folder is empty.

How should I build filesystem to get the filesystem with  /sys/kernel/debug/pm_debug folder?

AM3358: MMC CMD signal distorts after CMD4 command

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Part Number: AM3358

Hi, All,

We connects TF card to the AM3358 MMC0 port.

During the TF card initialization, the CMD16 command always fails.

And using oscilloscope, we noticed that after the processor executes CMD4 command, the CMD signal line becomes distorted as you can see from the attached captured waveforms below.

What is the possible cause of this issue? should CMD4 be removed during card initialization?

Thanks,

1) the waveform of CMD4 command.

2) the CMD signal distortion after CMD4 command.

TMDSCSK8127: TMDSCSK8127

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Part Number: TMDSCSK8127

I work with TMDSCSK8127 board

Using DM8127 IPNC RDK Release (v3.9.1)

At TI81XX PSP PM SUSPEND RESUME User Guide I see the next:


To turn off power domains with power switches if they are idle(no clock is active) during suspend enable following
flag:
$echo 1 > /sys/kernel/debug/pm_debug/turnoff_idle_powerdomains
To disable this:
$echo 0 > /sys/kernel/debug/pm_debug/turnoff_idle_powerdomains


But my target filesystem doesnt have the /sys/kernel/debug/pm_debug folder

It s just has  /sys/kernel/debug folder and this folder is empty.

How should I build filesystem to get the filesystem with  /sys/kernel/debug/pm_debug folder?

AM5728: DSP SYSBIOS clock issue

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Hi forum,

I am getting super frustrated by not being able to run the OS Clock module run properly on the DSP1 of a AM5728.

I am trying to use GPTimer14 (Id:13) that is configured in the Linux Device Tree as belonging to DSP1.

Therefore I made a simple project that replicates the problem which contains the .cfg, a makefile and one .c file.

Basically, I launch a task that should sleep for 1000ms and print something every time sleep expires.

Additionally, I defined the Clock as USER type and I am calling Clock_tick() myself from a custom function but this is never called because the Clock tick is stuck at zero.

static int n = 0;
Void myTimerTick(UArg arg)
{
	Clock_tick();
	n++;
	if(n%1000 == 0)
	{
    	Log_print1(Diags_INFO, "Clock_tick() %d\n", n);
	}
}

/*
 *  ======== main ========
 */
Int main(Int argc, Char* argv[])
{
    Error_Block     eb;
    Task_Params     taskParams;

    Log_print0(Diags_ENTRY, "--> main:");

    /* must initialize the error block before using it */
    Error_init(&eb);

    /* create main thread (interrupts not enabled in main on BIOS) */
    Task_Params_init(&taskParams);
    taskParams.instance->name = "task";
    taskParams.arg0 = (UArg)argc;
    taskParams.arg1 = (UArg)argv;
    taskParams.stackSize = 0x1000;
    Task_create(main_task, &taskParams, &eb);

    if (Error_check(&eb)) {
        System_abort("main: failed to create application startup thread");
    }

    /* start scheduler, this never returns */
    BIOS_start();

    /* should never get here */
    Log_print0(Diags_EXIT, "<-- main:");
    return (0);
}


/*
 *  ======== main_task ========
 */
Void main_task(UArg arg0, UArg arg1)
{
    Log_print0(Diags_ENTRY, "--> main_task:");

	while(1)
	{
		Task_sleep(1000);
    	Log_print0(Diags_INFO, "System_sleep() returned %d\n");
	}

    Log_print0(Diags_EXIT, "<-- main_task:");
}

I should add that I confirm that my GPTimer14 is properly working (base: 0x4882A000, TCLR=0x3, TCRR-increments when debugger stepping).

Please provide some RTOS or DRA7xx expert advice on this as I couldn't find any solution myself.

Best regards

(Please visit the site to view this file)

AM5728: USB camera issue

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Part Number: AM5728

Hello TI,

I am using a general purpose EVM of AM5728. I am using ti-processor-sdk-linux-am57xx-evm-06.00.00.07 SDK.

I have a usb uvc webcam connected to it. I am trying to use the webcam through VIP VPE IVAHD MPEG4 ENCODE/DECODE app,

But I got the following error message and doesn't work.

root@am57xx-evm:~#
root@am57xx-evm:~# [ 1833.798260] usb 1-1.1: reset high-speed USB device number 3 using xhci-hcd
[ 1836.160289] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1

Thanks

66AK2H12: K2H C66x core L2 cache value

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Part Number: 66AK2H12

Hi Champs,

We would like to confirm which is real L2 cache value on the each of C66 core pack.

According to this Figure 1-1 , each of C66 core pack L2 memory size is 1024KB.

On the other hand , this 1.8.4 L2 capacity mentioned maximum 256Kbyte.

So, we used to set this L2 size at CCS standard lib.

ti_sysbios_family_c66_Cache.initSize.l2Size = ti_sysbios_family_c66_Cache.L2Size_256K;

So, which is maximum L2 size number ?

If it is 1024K is available , can we set ti_sysbios_family_c66_Cache.initSize.l2Size = ti_sysbios_family_c66_Cache.L2Size_1024K; ?

Regards,

Kz777


CCS/TDA3XEVM: Using vxlib for resizing a image effficiently

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Part Number: TDA3XEVM

Tool/software: Code Composer Studio

Hello,

I am using existing vxlib for resizing a image.The location of the Vxlib is :

C:\PROCESSOR_SDK_VISION_03_03_00_00\ti_components\algorithms\vxlib_c66x_1_1_1_0\packages\ti\vxlib\src\vx\VXLIB_scaleImageBilinear_i8u_o8u.

The function is :VXLIB_scaleImageBilinear_i8u_o8u

My input image is 384×288,output is 768×576.

My codes are below:

unsigned short srcWidth = 384, dstWidth = 768;
unsigned short srcHeight = 288, dstHeight = 576;


float xs = (float)srcWidth /(float)dstWidth;

float ys = (float)srcHeight/(float)dstHeight;

unsigned short srcStride = 390, dstStride = 770;

unsigned int srcBufWidth = VXLIB_max(srcStride, ((dstWidth+2) * xs)+2);
unsigned int srcBufHeight = ((dstHeight+2) * ys) + 2;
unsigned int srcBufXstart = (srcBufWidth - srcWidth)/2;
unsigned int srcBufYstart = (srcBufHeight- srcHeight)/2;

VXLIB_bufParams2D_t src_addr, dst_addr;

float xScale, yScale;
int status_opt = 0;

src_addr.dim_x = srcBufWidth;
src_addr.dim_y = srcBufHeight;
src_addr.stride_y = srcBufWidth;
src_addr.data_type = VXLIB_UINT8;

dst_addr.dim_x = dstWidth;
dst_addr.dim_y = dstHeight;
dst_addr.stride_y = dstStride;
dst_addr.data_type = VXLIB_UINT8;

xScale = (float)srcWidth/(float)dstWidth;
yScale = (float)srcHeight/(float)dstHeight;

status_opt = VXLIB_scaleImageBilinear_i8u_o8u((Uint8 *)buffTemp, &src_addr, (Uint8 *)outputPtr, &dst_addr, xScale, yScale, -srcBufXstart, -srcBufYstart, 0, 0);

The result is wrong.

I guess some parameter is not right,I am wondering how to set srcStride and  dstStride?

Will you help me?

Thank you.

AM6526: Heatsink considerations

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Part Number: AM6526

Hi,

My customers are very interested in AM65xx series. They want to design without a heat sink.
Can it be used without a heat sink?

If possible, would you tell me the restrictions.
For example, A53-Core operates at 400MHz , limited the peripherals.

Regards,
Rei

AM3356: McSPI DMA transfer issue

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Part Number: AM3356

Hi All,

In my custom H/W, ADC is connected(ADS131E04) over McSPI0, and DRDY pin of ADC is connected to GPIO0 pin 18

I want to transfer data from ADC to CPU using GPIO event trigger(DRDY) using DMA

I configured DMA event 22(GPIO DMA event) and set destination address as McSPI0 TX FIFO.

I can see only 2 bytes transferring when DRDY pin go low, but my total byte count  is 15.

Am I missing something in configuration?

Please assist me on this, Thanks for help in advance:)

Regards,

Manju

TDA2E: Sgx3DsrvLink issue

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Part Number: TDA2E

Hi,

Is it possible that  sometimes in Sgx3DsrvLink_tskMain at OSA_tskWaitMsg will wait message for a abnormally  long time,

maybe 1~10 minutes,

and then receive the message again,

my customize usecase like below,

the links that was crossed out by black was taken off,

In particular, this situation often occurs in software versions where the alg links require more computation,

also usually occurs in 720p/25fps instead of 720p/30fps vedio format.

my environment

vision_sdk302

tda2eg

Linux version 4.4.84-00018-gd326d64-dirty

AM6526: Cortex-R5F performance

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Part Number: AM6526

Hi,
Would you tell us about the Cortex-R5F core on the AM65 series.

I think
Cortex-M4F (MSP432) <Cortex-R5F (AM65xx) <Cortex-A8 (AM335x)

Would you tell me if there is a document on performance (DMIPS/MHz) etc.

Regards,
Rei

TMS320C6678: Exception fetch packet quite strange

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Part Number: TMS320C6678

Hello experts,

I have a strange error case.

We have a nice application running on our custom board with several C6678, running like a clock. TI-RTOS is used.

One core has one task which is waken up every second (using a timer) that does some Ethernet UDP calls then sleeps.
We found an error in the code of the task : a variable was incremented and it shouldn't be. So we removed the instruction

And that's when all hell breaks loose

--> now we get an exception fetch packet error systematically.
--> it's really a 1 line change from working to not working

first I suspected a stack overflow: I checked with ROV : all modules are fine, tasks have enough stack.

Then I put a breakpoint in TI sysbios HWI1 which is the handler that manages exception and looked at the core registers

I have
IERR = 0x1 --> Fetch packet exception
NRP = 0x0 unfortunately
B3 = 0x804C4C --> I looked in the memory browser it corresponds to the TI code for ti_sysbios_knl_Task_schedule__I

We also have system analyser setup for this core

Here's what it is looking like when all is working

when we have the exception, sorry I don't have the capture but it looks like this

--> so my current understanding is
The core is in the "stack test" task. A semaphore pend occurs, triggering the task scheduler which crashes.

Using system analyser and ROV we know that this semaphore is from a GateMutex. Problem is: I don't know where it comes from as we don't use Gate mutex directly.
we use multicore gates (GateMP) with GateMP_LocalProtect_TASKLET as local protect so it probably comes from here.

Also looking at the memory map differences, we see that fardata is split in two, and some objets are moved (such as ti_sysbios_gates_GateMutex_Object__table__V)

below file OK

(Please visit the site to view this file)

below file KO

(Please visit the site to view this file)

--> do you have any ideas what could cause this ?
remember it's a one line difference in the code

Thanks
Regards

TMS320C6657: bootloader for C6657

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Part Number: TMS320C6657

Hi all,

Customer current use .btbl .rmd method for boot. They use the internal ram only.

But now customer want to run the program on external DDR. So I want check if TI  have the demo of the sbl for C6657/6678?

Or do you have any other suggestion about this requirement? 

thanks!

BR,
Denny


PROCESSOR-SDK-AM437X: PRU HSR-PRP-DAN new version

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Part Number: PROCESSOR-SDK-AM437X

Dear TI,

I'm curious if you have scheduled new realise of HSR/PRP which will run with PROCESSOR SDK AM437x v6 or newer?

Regards,
Mare

TDA2PXEVM: boot from EMMC flash based on visionSDK 03 05

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Part Number: TDA2PXEVM

Hello,

We are ready to boot from EMMC flash based on visionSDK 03 05, but it fails. On the other hand, we can boot from SD card normal with the same program. What shoud we have to modify? Below is the uenv.txt include emmc and sd.Also you can find the emmc boot log in the attachment.

Thanks 

Terence

==============================uenv_sd.txt================================

fdtfile=dra76-evm-infoadas.dtb
args_mmc=part uuid mmc 0:2 uuid; setenv bootargs "console=ttyS0,115200n8 vram=16M root=PARTUUID=${uuid} rw rootwait ip=none mem=1024M cma=128M"

===============================uenv_emmc.txt===========================

mmcargs=setenv bootargs 'console=ttyO0,115200n8 elevator=noop root=/dev/mmcblk0p2 rw rootwait earlyprintk fixrtc omapdrm.num_crtc=2 consoleblank=0 cma=64M rootfstype=ext4 snd.slots_reserved=1,1'

========================================================================

(Please visit the site to view this file)

Compiler/66AK2H12: .const area statement when C66 core compile.

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Part Number: 66AK2H12

Tool/software: TI C/C++ Compiler

Hi Champs,

We would like to confirm "memory" ,"selection" when we build C66x core base program.

When we create large global variable area :"static unsigned char s_result[1226908];",

const area was separated i.e. const0 and const 1.

However, when we decrease this number as "static unsigned char s_result[1045000];" , const area didn't separate.

Do you have any threshold value to separate ".const" area ?

Regards,

Kz777

RTOS/AM5728: AM572x_EVM

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Part Number: AM5728

Tool/software: TI-RTOS

Hi All,

  I tried to build RTOS based NIMU basic example for M4 core and able to build and run over AM572x_EVM.  

  I just want to transfer some data from M4 core to host PC using any NDK service. Can I know which NDK service should I use to transfer data towards PC.

  Am using TI RTOS SDK over Am572x_EVM. Able to ping my target board from host PC

Regards,

Geek13

OMAPL138B-EP: GPIO Delay Calculation

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Part Number: OMAPL138B-EP

HI,

I am using OMAPL138 board, I have a query.

I will toggle a GPIO , what is the time taken between the register write and actual physical line going high/low.

Is there a way to find it out.

Thanks,

Janardan

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