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TDA2EVM5777: TIDL: How to change TIDL network input size?

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Part Number: TDA2EVM5777

Hi!

I'm doing some experiments with TIDL_OD Usecase.

TIDL_OD Usecase's default network input size is 768 * 320.

Can I change this input size without limitation?

If resize possible, Can I simply resize the input size in usecase source? (Assuming, of course, that network model has been adjusted.)

Or do i need something extra?

I would appreciate it if you let me know.

Regards,

Lee.


TDA2EVM5777: Linux: Order of use OSA_memCacheWb(), OSA_memCacheInv() function

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Part Number: TDA2EVM5777

Hi,

I have questions while analyzing the source code of TI VSDK.

I'm curious to know the order in which these two functions (OSA_memCacheWb(), and OSA_memCacheInv())).

I generally understand that first use OSA_memCacheInv() before use OSA_memCacheWb().

But does virtual address (ChainsCommon_Ossal_getVirtAddr) change the function order?

I found the usecase that used OSA_memCacheWb() before used OSA_memCacheInv(). (Of course, we used a virtual address here)

Usecase location : "vision_sdk/apps/src/hlos/infoadas/src/chains/a15source_2d_srv/chains_a15Source2dSurroundView.c"

I'm a little embarrassed.

Has the order of use of both functions been changed using the virtual address?

I would appreciate it if you let me know.

Regards,

Lee.

OMAPL138 nand ecc err

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HI, 

    When we used OMAPL138 to design the board and ported the LINUX system, something went wrong

CPU: omapl138

OS: LINUX3.3(KERNEL)

FS: UBIFS

Hardware design reference board: OMAPL138 LCDK

FUNCTION: NAND FLASH HW ECC

My NAND FLASH CHIP: MT29F8G16ADADAH4. and LCDK use chip is MT29F4G16ABADAH4

problem phenomenon:  When boot the kernel, UART cycle print :  UBI error: ubi_io_read: error -74 (ECC error) while reading 64 bytes from PEB 0:0, read 64 bytes, and boot kernel failed.

If the problem is not clearly described, please tell me.

[TDA4M] There are no uart logs from MCU side.

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Hello,

I checked if the image with Linux on A72 and sysbios on other cores worked well with SD card boot mode.

-----------------------------------------------------------------------------------------------------------------------------------------------------------------

[Test environment]

1. Prepare SD card for boot 

cd /media/$USER/BOOT

# Copy boot loader files
cp ${PSDKLA_PATH}/board-support/prebuilt-images/tiboot3.bin .
cp ${PSDKLA_PATH}/board-support/prebuilt-images/tispl.bin .
cp ${PSDKLA_PATH}/board-support/prebuilt-images/u-boot.img .
# Copy SYWFW binary
# NOTE, below file is renamed before copying to boot partition
cp ${PSDKLA_PATH}/board-support/prebuilt-images/sysfw.itb.psdkra sysfw.itb

2. App Image

  - PSDK RTOS v0.9

-----------------------------------------------------------------------------------------------------------------------------------------------------------------

I have questions:

Q1) Loading sequence of the below boot images is right? If not, please correct the sequence.

tiboot3.bin (M3 on wakeup domain ?)-> tispl.bin (R5 on mcu domain or R5 on main domain ?) -> u-boot.img (A72 on main domain ?) -> sysfw.itb(R5 on MCU or Main, A72 ?)

Q2) While boot logs were printed at A72 uart0 console, there was no logs at MCU uart1 console.

      The error logs highlighted with Yellow are related with no log printing at MCU uart1? Even if there were no logs at MCU uart1, was MCU working well or not?

      Furthermore, hex data logs(0xXXXXX) are printed out at WKUP uart0 console, so please can you check if hex log out is OK?

[A72 uart0 logs]

-----------------------------------------------------------------------------------------------------------------------------------------------------------------

U-Boot SPL 2019.01-g6e54d1f7fa (Jul 17 2019 - 09:37:31 +0000)

SYSFW ABI: 2.6 (firmware rev 0x0013 '19.6.1-v2019.06a (Terrific Llam')
Trying to boot from MMC2
Loading Environment from MMC... *** Warning - No MMC card found, using default environment

Remoteproc 2 started successfully
** File not found /lib/firmware/j7-mcu-r5f0_0-fw **
Starting ATF on ARM64 core...

.....

## Error: "start_rprocs_mmc" not defined
9501932 bytes read in 1428 ms (6.3 MiB/s)
Load Remote Processor 3 with data@addr=0x80080000 9501932 bytes: Success!


** File not found /lib/firmware/j7-main-r5f1_0-fw **

-----------------------------------------------------------------------------------------------------------------------------------------------------------------

Thanks

Soolim

TDA3LX: Question on TDA3LX

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Part Number: TDA3LX

Hi Expert,

is there power consumption estimation of TDA3LX?

what's the price of TDA3LX/1k?rough price is fine for preliminary estimation.

thanks.

AM4378: How to implement serial port in QT by use of AM4378- SDK 4.02?

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Part Number: AM4378

Hello,

Our board is based AM437x-gp-evm. We use SDK 4.02. I want to implement serial port in QT by use of SDK4.02(AM4378).

Do you have any example code for this?

How to implement serial port in QT by use of SDK 4.02 ?

Regards,

Winiston.P

AM4377: Ethernet RMII send fails

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Part Number: AM4377

The AM4377 uses the RMII interface to connect to the DP83848 and connects to the computer via a network cable (the network card is the Intel(R) PRO/1000 MT Dual Port Server Adapter).
See the accessories for hardware pin settings.
Pinmux settings:
static struct module_pin_mux rmii2_pin_mux[] = {
{OFFSET(gpmc_a0), MODE(3)| SLEWCTRL}, /* RMII2_TXEN:*/
{OFFSET(gpmc_a4), MODE(3)| SLEWCTRL}, /* RMII2_TXD1:*/
{OFFSET(gpmc_a5), MODE(3)| SLEWCTRL}, /* RMII2_TXD0:*/
{OFFSET(gpmc_a10), MODE(3) | SLEWCTRL | RXACTIVE}, /* RMII2_RXD1:*/
{OFFSET(gpmc_a11), MODE(3) | SLEWCTRL | RXACTIVE}, /* RMII2_RXD0:*/
{OFFSET(gpmc_wait0), MODE(3) | PULLUP_EN | RXACTIVE}, /* RMII2_CRS_DV:*/
{OFFSET(gpmc_wpn), MODE(3) | SLEWCTRL | RXACTIVE}, /* RMII2_RXER:*/
{OFFSET(mii1_col), MODE(1) | RXACTIVE}, /* RMII2_refclk:*/
{-1},(Please visit the site to view this file)
};

At initialization, phy is only configured for auto-negotiation enable, others are default values. The mac of the 4377 is configured in RMII mode, and the clock is configured as "chip pin". After the mode is started, the link and auto-negotiation are normal and can be pinged.

[1] However, after the network cable is unplugged and plugged in, the sending direction is unreachable. The transmission interrupt is not increased. The tx_D0/D1 and tx_en pins are low, and the external clock is 50M ok. The current post-plugging process is to reconfigure an auto-negotiation and write Bit12 of the ctrl register, but the re-execution auto-negotiation should write bit12 or bit9 of the ctrl register?
12:AUTO-NEGOTIATION Strap, RW Auto-Negotiation Enable:
9:RESTART 0, RW/SC Restart Auto-Negotiation:

[2] When the board is connected to the computer of the windows system, the network cable is unplugged and cannot be sent. The result of replacing multiple computers is the same.However, when the board is connected to the computer of the linux system, the connection can be restored, and the two boards are directly connected, it can also be restored to normal (the board uses linux system). The difference is that the ARP packets sent by the computer received after plugging in the Internet cable are about 10 packets, but it will receive dozens of interrupts/packages when connected with Windows. I want to know if it is a hardware or software problem?

Is there a problem with the configuration of phy or mac? Which directions should I check?
Thank you!

RTOS/AM5728: SPI Rx data corrupted

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Part Number: AM5728

Tool/software: TI-RTOS

Hi,

This is regarding the spi read issue from the salve(GPS module),

we are using the spi for reading data from the gps ,whie on the spi lines data is correct, but inside the rx buffer in the driver we are getting the corrupted data.

we tried all the frequency ranges mentioned for the slave, wiht different polarity and phases.

what s the cause for corruption only inside the rx buffer for spi.

thanks

Ranganath


Compiler/TDA2SX: How to remove CPLD muxing for Custom Board

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Part Number: TDA2SX

Tool/software: TI C/C++ Compiler

Hi,

I am using TDA2xx reference board. I am using Vision SDK 3.04 as reference code. I want to remove all MUX code and CPLD programming from this reference code. Can you please help me what are the changes require for Pin mux to bringup camera and display for my custom board.

In my custom board, I am using TDA2Sx SOC.

I did pinmux in uboot mux_data and device tree also changed as well as pinmux.

Q1) As per the board, what are the changed need to do in PDK ??

Q2) what and all changes have to do in Bsp_boardSetPinMuxTda2xx ?

Regards,

ARUNKUMAR V N

AM3352: USB Bulk transfer issue

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Part Number: AM3352

Hi Champs,

We have USB data transmit issue.

<Phenomenon>

USB data transmit is failing from Host to device (AM335x) when send over 64KB data.

If the data value  is less than 64KB, data is success. 

<Environment>

* USB bulk mode

*Communicate PC (HOST) to AM335x EVM based custom board (Device) 

Could you please any reason ?

When you assigned people, I will send detail data for packet analysis and sequence tree.

Please let us know.

CCS/BEAGLEBOARD-X15: DSP debug issue

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Part Number: BEAGLEBOARD-X15

Tool/software: Code Composer Studio

Hi,

I have created a simple Hello World example to check the SDK 6 (Linux) and CCS 9 DSP debugging features. I would like to follow the instructions in the page below:

http://downloads.ti.com/mctools/esd/docs/opencl/debug/debug_ccs.html

Unfortunately I cannot connect the DSP cores after launching the target configurations. I have tried with both AM5728 and GPEMV_AM572X target configurations. Currently I am using Blackhawk USB 560v2 as a JTAG emulator.

The error message is below:

Error connecting to the target:
(Error -1180 @ 0x0)
Device is held in reset. Take the device out of reset, and retry the operation.
(Emulation package 8.1.0.00007)

I appreciate if you can give any suggestions to make the DSP cores out of reset state.

Kind Regards,

Mustafa

TDA2SX: VisionSDK ,PVR GPU render,Surroundview

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Part Number: TDA2SX

i have changed the render.cpp &srv.cpp of visionsdk  use my comfirmed on PC,when i run it on TDA2X the error log is like that:

 PVR_K:(Error): SGXOSTimer() detected SGX lockup (0x1489 tasks)
[   48.231248] PVR_K: HWRecoveryResetSGX: SGX Hardware Recovery triggered
[   48.237844] PVR_K: SGX debug (SGX_DDK sgxddk MAIN@3699939)
[   48.243366] PVR_K:(Error): SGX Register Base Address (Linear):   0xf45a0000
[   48.250429] PVR_K:(Error): SGX Register Base Address (Physical): 0x56000000
[   48.257478] PVR_K: Running SGXREG Debug Scripts:
[   48.262129] PVR_K: (HYD)
[   48.264723] PVR_K:   (SGXREG) 0x00004000 : 0x00000001
[   48.269716] PVR_K:   (SGXREG) 0x00004004 : 0x0000000A
[   48.274753] PVR_K:   (SGXREG) 0x00004008 : 0x0000000F
[   48.279752] PVR_K:   (SGXREG) 0x00004024 : 0x00000009
[   48.284786] PVR_K:   (SGXREG) 0x00004118 : 0x00000010
[   48.289777] PVR_K:   (SGXREG) 0x0000412C : 0x20000000
[   48.294816] PVR_K:   (SGXREG) 0x00004404 : 0x00000000
[   48.299807] PVR_K:   (SGXREG) 0x00004C04 : 0x00080000
[   48.304839] PVR_K:   (SGXREG) 0x00004C08 : 0x00000000
[   48.309829] PVR_K:   (SGXREG) 0x00004C74 : 0x00000000
[   48.314868] PVR_K:   (SGXREG) 0x00004C78 : 0x00000010
[   48.319857] PVR_K:   (SGXREG) 0x00004CA8 : 0x00000000
[   48.324915] PVR_K: (P0)
[   48.327386] PVR_K:   (SGXREG) 0x00008000 : 0x002AAAAA
[   48.332376] PVR_K:   (SGXREG) 0x00008004 : 0x0A8A8AAA
[   48.337415] PVR_K:   (SGXREG) 0x00008008 : 0x01F888F8
[   48.342404] PVR_K:   (SGXREG) 0x00008118 : 0x000000B0
[   48.347444] PVR_K:   (SGXREG) 0x0000812C : 0x24142600
[   48.352434] PVR_K:   (SGXREG) 0x000084E4 : 0x00014274
[   48.357467] PVR_K:   (SGXREG) 0x00008658 : 0x00000000
[   48.362465] PVR_K:   (SGXREG) 0x00008A74 : 0x0E208200
[   48.367498] PVR_K:   (SGXREG) 0x00008BA4 : 0x00000014
[   48.372488] PVR_K:   (SGXREG) 0x00008C04 : 0x000D0400
[   48.377521] PVR_K:   (SGXREG) 0x00008C08 : 0x231B2031
[   48.382509] PVR_K:   (SGXREG) 0x00008C74 : 0x00000000
[   48.387665] PVR_K:   (SGXREG) 0x00008C78 : 0x00000017
[   48.392656] PVR_K:   (SGXREG) 0x00008CB4 : 0x00000000
[   48.397701] PVR_K:   (SGXREG) 0x00008E04 : 0x00000000
[   48.402690] PVR_K:   (SGXREG) 0x00008624 : 0x00000000
[   48.407726] PVR_K:   (SGXREG) 0x00008628 : 0x00000000
[   48.412724] PVR_K:   (SGXREG) 0x00008630 : 0x00000000
[   48.417758] PVR_K:   (SGXREG) 0x00008664 : 0x00000000
[   48.422747] PVR_K:   (SGXREG) 0x00008734 : 0x00000000
[   48.427805] PVR_K:   (SGXREG) 0x00008AA4 : 0xAAAAAAAA
[   48.432794] PVR_K:   (SGXREG) 0x00008AA8 : 0xAAAAAAAA
[   48.437833] PVR_K:   (SGXREG) 0x00008B08 : 0x00016C8E
[   48.442823] PVR_K:   (SGXREG) 0x00008B14 : 0x000189FC
[   48.447861] PVR_K:   (SGXREG) 0x00008B0C : 0x0001095A
[   48.452850] PVR_K:   (SGXREG) 0x00008B18 : 0x00000875
[   48.457884] PVR_K:   (SGXREG) 0x00008B10 : 0x00011489
[   48.462883] PVR_K:   (SGXREG) 0x00008B1C : 0x00010000
[   48.467915] PVR_K:   (SGXREG) 0x00008B80 : 0xAAAAAAAA
[   48.472904] PVR_K:   (SGXREG) 0x00008B84 : 0xAAAAAAAA
[   48.477939] PVR_K:   (SGXREG) 0x00008B88 : 0x000154E0
[   48.482929] PVR_K:   (SGXREG) 0x00008B94 : 0x000158CC
[   48.487961] PVR_K:   (SGXREG) 0x00008B8C : 0x00000873
[   48.492949] PVR_K:   (SGXREG) 0x00008B98 : 0x00010872
[   48.497987] PVR_K:   (SGXREG) 0x00008B90 : 0x00010000
[   48.502977] PVR_K:   (SGXREG) 0x00008B9C : 0x00010000
[   48.508009] PVR_K: (P1)
[   48.510478] PVR_K:   (SGXREG) 0x0000C000 : 0x002AAAAA
[   48.515516] PVR_K:   (SGXREG) 0x0000C004 : 0x0A8A8AAA
[   48.520510] PVR_K:   (SGXREG) 0x0000C008 : 0x017808F8
[   48.525568] PVR_K:   (SGXREG) 0x0000C118 : 0x000000B0
[   48.530567] PVR_K:   (SGXREG) 0x0000C12C : 0x04142600
[   48.535604] PVR_K:   (SGXREG) 0x0000C4E4 : 0x0001FFFF
[   48.540593] PVR_K:   (SGXREG) 0x0000C658 : 0x00000000
[   48.545630] PVR_K:   (SGXREG) 0x0000CA74 : 0x0E208200
[   48.550620] PVR_K:   (SGXREG) 0x0000CBA4 : 0x00000014
[   48.555653] PVR_K:   (SGXREG) 0x0000CC04 : 0x000D0400
[   48.560652] PVR_K:   (SGXREG) 0x0000CC08 : 0x1EEFF021
[   48.565683] PVR_K:   (SGXREG) 0x0000CC74 : 0x00000000
[   48.570672] PVR_K:   (SGXREG) 0x0000CC78 : 0x00000017
[   48.575704] PVR_K:   (SGXREG) 0x0000CCB4 : 0x00000000
[   48.580702] PVR_K:   (SGXREG) 0x0000CE04 : 0x00000000
[   48.585733] PVR_K:   (SGXREG) 0x0000C624 : 0x00000000
[   48.590722] PVR_K:   (SGXREG) 0x0000C628 : 0x00000000
[   48.595759] PVR_K:   (SGXREG) 0x0000C630 : 0x00000000
[   48.600751] PVR_K:   (SGXREG) 0x0000C664 : 0x00000000
[   48.605785] PVR_K:   (SGXREG) 0x0000C734 : 0x00000000
[   48.610782] PVR_K:   (SGXREG) 0x0000CAA4 : 0xAAAAAAAA
[   48.615815] PVR_K:   (SGXREG) 0x0000CAA8 : 0xAAAAAAAA
[   48.620804] PVR_K:   (SGXREG) 0x0000CB08 : 0x00017D7A
[   48.625858] PVR_K:   (SGXREG) 0x0000CB14 : 0x0001A09B
[   48.630857] PVR_K:   (SGXREG) 0x0000CB0C : 0x0000092C
[   48.635894] PVR_K:   (SGXREG) 0x0000CB18 : 0x00010847
[   48.640882] PVR_K:   (SGXREG) 0x0000CB10 : 0x00010000
[   48.645929] PVR_K:   (SGXREG) 0x0000CB1C : 0x00010000
[   48.650918] PVR_K:   (SGXREG) 0x0000CB80 : 0xAAAAAAAA
[   48.655951] PVR_K:   (SGXREG) 0x0000CB84 : 0xAAAAAAAA
[   48.660949] PVR_K:   (SGXREG) 0x0000CB88 : 0x0001684E
[   48.665981] PVR_K:   (SGXREG) 0x0000CB94 : 0x000166D3
[   48.670970] PVR_K:   (SGXREG) 0x0000CB8C : 0x00010845
[   48.676002] PVR_K:   (SGXREG) 0x0000CB98 : 0x00010848
[   48.681000] PVR_K:   (SGXREG) 0x0000CB90 : 0x00010000
[   48.686032] PVR_K:   (SGXREG) 0x0000CB9C : 0x00010000
[   48.691021] PVR_K: SGX Register Dump:
[   48.694752] PVR_K: (P0) EUR_CR_CORE_ID:          01191201
[   48.700178] PVR_K: (P0) EUR_CR_CORE_REVISION:    00010106
[   48.705651] PVR_K: (P0) EUR_CR_EVENT_STATUS:     24142600
[   48.711085] PVR_K: (P0) EUR_CR_EVENT_STATUS2:    000000B0
[   48.716555] PVR_K: (P0) EUR_CR_BIF_CTRL:         00000000
[   48.721980] PVR_K: (P0) EUR_CR_BIF_BANK0:        00000017
[   48.727474] PVR_K: (P0) EUR_CR_BIF_INT_STAT:     000D0400
[   48.732899] PVR_K: (P0) EUR_CR_BIF_FAULT:        231B2031
[   48.738372] PVR_K: (P0) EUR_CR_BIF_MEM_REQ_STAT: 00000000
[   48.743806] PVR_K: (P0) EUR_CR_CLKGATECTL:       002AAAAA
[   48.749276] PVR_K: (P1) EUR_CR_EVENT_STATUS:     04142600
[   48.754744] PVR_K: (P1) EUR_CR_EVENT_STATUS2:    000000B0
[   48.760170] PVR_K: (P1) EUR_CR_BIF_CTRL:         00000000
[   48.765643] PVR_K: (P1) EUR_CR_BIF_BANK0:        00000017
[   48.771069] PVR_K: (P1) EUR_CR_BIF_INT_STAT:     000D0400
[   48.776542] PVR_K: (P1) EUR_CR_BIF_FAULT:        1EEFF021
[   48.781981] PVR_K: (P1) EUR_CR_BIF_MEM_REQ_STAT: 00000000
[   48.787450] PVR_K: (P1) EUR_CR_CLKGATECTL:       002AAAAA
[   48.792878] PVR_K: Checking EDM memory context (index = 7, PD = 0xad66b000)
[   48.799922] PVR_K: Found MMU context for page fault 0x231b2000
[   48.805830] PVR_K: GPU memory context is for PID=212 (systemd-udevd)
[   48.812222] PVR_K: No PDE found
[   48.815426] PVR_K: Checking TA memory context (index = 1, PD = 0xab2a2000)
[   48.822333] PVR_K: Found MMU context for page fault 0x231b2000
[   48.828261] PVR_K: GPU memory context is for PID=732 (apps.out)
[   48.834210] PVR_K: No PDE found
[   48.837417] PVR_K: Checking 3D memory context (index = 0, PD = 0xad45f000)
[   48.844335] PVR_K: Found MMU context for page fault 0x231b2000
[   48.850239] PVR_K: GPU memory context is for PID=641 (weston)
[   48.856054] PVR_K: No PDE found
[   48.859213] PVR_K: Checking PTLA memory context (index = 0, PD = 0xad45f000)
[   48.866343] PVR_K: Found MMU context for page fault 0x231b2000
[   48.872205] PVR_K: GPU memory context is for PID=641 (weston)
[   48.878023] PVR_K: No PDE found
[   48.881183] PVR_K: Checking EDM memory context (index = 7, PD = 0xad66b000)
[   48.888304] PVR_K: Found MMU context for page fault 0x1eeff000
[   48.894177] PVR_K: GPU memory context is for PID=212 (systemd-udevd)
[   48.900610] PVR_K: No PDE found
[   48.903769] PVR_K: Checking TA memory context (index = 1, PD = 0xab2a2000)
[   48.910734] PVR_K: Found MMU context for page fault 0x1eeff000
[   48.916641] PVR_K: GPU memory context is for PID=732 (apps.out)
[   48.922589] PVR_K: No PDE found
[   48.925815] PVR_K: Checking 3D memory context (index = 0, PD = 0xad45f000)
[   48.932733] PVR_K: Found MMU context for page fault 0x1eeff000
[   48.938640] PVR_K: GPU memory context is for PID=641 (weston)
[   48.944421] PVR_K: No PDE found
[   48.947623] PVR_K: Checking PTLA memory context (index = 0, PD = 0xad45f000)
[   48.954745] PVR_K: Found MMU context for page fault 0x1eeff000
[   48.960616] PVR_K: GPU memory context is for PID=641 (weston)
[   48.966432] PVR_K: No PDE found
[   48.969593] PVR_K:  Host Ctl flags= 0000000c
[   48.973882] PVR_K: SGX Host control:

i haven't got what caused it

DRA786: DRA785 - MCAN - DPLL_GMAC_DSP jitter

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Part Number: DRA786

Hello,

a customer using DRA785 would like to understand the jitter for MCAN.

 

The DPLL_GMAC_DSP clock is used for this.

 

Questions:

  1. Max PLL jitter for the interval of 13 bit times [ns]
  2. Max PLL jitter for the interval of 10 bit times [ns]

 

The customer received the TI recommendation to apply following settings for best lock time and jitter behavior:

Multiplier M: 50

Divider N: 0

Fdpll = Fref ×2 ×M / (N + 1) = 20 MHz × 2 × 50 / (0 + 1) = 2000 MHz

 

Can TI provide jitter information for this setup?

Thanks, Stefan

AM3352: RGMII EMC issue

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Part Number: AM3352

Hello Sitara Team,

My customer reported EMC emission of 125MHz from RGMII TCLK.

Questions:

- Is the drive strength of the RGMII configurable?

- What measures will improve EMC noise?

Best Regards,

Simon

AM3352: USB test

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Part Number: AM3352

Hi

We are using am335x to develop a customized board.

Refer to http://processors.wiki.ti.com/index.php/UsbgeneralpageLinuxCore#musb_driver_debugfs. Use the following command:

echo "test packet" > /sys/kernel/debug/musb-hdrc.0/testmode

The waveform is as follows:

The waveform is not continuous, and the pattern is sent every 500 milliseconds.

When no pattern is output, the corresponding waveform is as follows:

So I'd like to ask if there is something wrong with our test method.

Our SDK version is 05.03.00.07


CCS/AM5708: CAL CSI-2 support

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Part Number: AM5708

Tool/software: Code Composer Studio

Hi experts,

My customer works with CAL, CSI-2 on AM5708 under RTOS/baremetal, but there is no any examples in SDK which shows setting up of the modules.

Could you please share the examples or give any recomendation of how to better set it up?

Thanks in advance!

TCI6638K2K: Ethernet NETCP dma rx_flow mapping

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Part Number: TCI6638K2K

Hi Everyone,

I am using custom K2HK board and PDK_06_00_00_07 for software (u-boot and kernel),

I need clarification on the device tree in LINUX for  NETCP DMA ( ti,navigator-dmas = <&dma_gbe 22>,  /* rx flow for CPSW port 0 */) , how to configure rx_flow value to bring up below mention phy-2 and phy-3 mapped to Gbe-2 and Gbe-3.

The K2HK EVM has two Marvell eth Phy, On our custom board we have 4 eth Phy (first two marvell 88e1111 and other two DP83867IS) all have configured for 4-wire SGMII between Phy and MAC.

At u-boot using first TI DP83867IS (Phy-2)we are able to ping (packet transmission is happing in both way, RX as well as TX),

but with second TI DP83867IS (Phy-3) ping is failing only one-way TX traffic is their (packet are coming out of K2HK board, but there is no RX packet),

At Linux using both TI DP83867IS Phy-2 and Phy3 ping is failing only one-way TX traffic is there.(DP83867 Linux driver is ported from u-boot ti.c driver)

Please find attached device tree file and NETCP node configure like below.

dma-coherent;
ti,navigator-dmas = <&dma_gbe 22>, /* rx flow for CPSW port 0 */
<&dma_gbe 23>, /* rx flow for CPSW port 1 */
<&dma_gbe 24>, /* rx flow for CPSW port 2 */
<&dma_gbe 25>, /* rx flow for CPSW port 3 */
<&dma_gbe 8>; /* CPSW tx channel */
ti,navigator-dma-names = "netrx0",
"netrx1",
"netrx2",
"netrx3",
"nettx";

While debugging at u-boot found that for both phy-2 and phy3 rx_flow is 24(as per device tree configuration rx_flow should be 24 for phy-2 and 25 for phy-3).

Any working  Reference for device tree for NETCP dma rx_flow at Linux is most welcome.

(Please visit the site to view this file)(Please visit the site to view this file)

Regards,

Snehal 

CCS/BEAGLEBOARD-X15: Degugging with CCS

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Part Number: BEAGLEBOARD-X15

Tool/software: Code Composer Studio

Hi,

I am trying to test the features of SDK 6 with Beagleboard-X15 and mostly I am focused with degugging (and profiling in advance) DSP codes with are offloaded with OpenMP. Unfortunately I could not be successful at debugging with CCS. For debugging with CCS, I have followed the instructions in the page below:

http://downloads.ti.com/mctools/esd/docs/opencl/debug/debug_ccs.html#debug-dsp-side-code-with-ccs

I have started with building the examples included in the SDK. (printf_debug) By default the applications are build as Release with -O3 optimization flag, I have added debug flag ( -g ) and make the application has no optimization with ( -O0 ) in the makefile. The makefile becomes like below ( I did not include the whole makefile, other parts of the makefile still same as by default. ) :

OA_TC_OPTS 			= -O0 -g
ifeq ($(VERBOSE),1)
OA_HC_OPTS 			= -O0 -g -Wall -Wextra -fopenmp
OA_SHELL_OPTS 		        = -v -k --hc="$(OA_HC_OPTS)" --tc="$(OA_TC_OPTS)"
else
OA_HC_OPTS 			= -O0 -g -fopenmp
OA_SHELL_OPTS 		        = --hc="$(OA_HC_OPTS)" --tc="$(OA_TC_OPTS)"
endif
CXX_OPTS 			        = -O0 -g

I have checked the application if the symbols are included, everything seems ok. 

After being sure everything is Ok, I have created a Makefile Project with Existing Code in CCS 9 and make the necessary configuration so the example can be cleaned and built from the CCS.

Then I tried to follow the instructions in the web page regarding DSP side debugging with CCS (Please find the link above.)

I have created User Defined Target Configuration, I am using Blackhawk USB560v2 System Trace, so I have set the Connection: Blackhawk XDS560v2-USB System Trace Emulator and Device: AM5728. I have launched the target configuration and have no errors. I have connected the first DSP. Everything seems fine to me until this point. ( I have tried with also GPEVM_AM572X. )

Then I have started the application with TI_OCL_DEBUG=ccs as it is suggested in the webside. It dumps some information as in the website and waits for the key. I have copied the opencl*****.out file to the development environment from the target, I have loaded the symbols from it added the symbols from dsp.out. When the time comes to adding a breakpoint as it is suggested by the application ( some OpenMP generated function is suggested. ) CCS could not enable it. CCS adds it to the list of breakpoints, it is still gray, even if I tried to enable it. Furthermore I could not add any breakpoints to the offloaded code fragments in the CCS.

I have check opencl******.out for the symbols. There is no such a symbol in it. Besides the symbol exists in the elf file.

I appreciate if you can give any hint to add proper breakpoints to the DSP offloaded code. There can be missing information above, please do not hesitate to ask. Please also check the printf_debug example.

Kind Regards,

Mustafa

CCS/AM3358: Can you provide me AM 3358 McASP example project for beaglebone black?

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Part Number: AM3358

Tool/software: Code Composer Studio

 I saw MCASP_Audio_evmAM335x_armExampleProject and and MCASP_DeviceLoopback_evmAM335x_armExampleProject for evm. Thanks

CCS/AM3358: does pdk_am335x_1_0_15 support I2C? does pdk_am335x_1_0_15 support HSI2C?

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Part Number: AM3358

Tool/software: Code Composer Studio

StarterWare 02.00.01.01 User Guide didn't mentionI2C. It said

HSI2C

Introduction

The HSI2C component is in complaint with the Philips Semiconductors Inter-IC bus (I2C-bus) specification version 2.1. The HSI2C module supports only Fast mode (up to 400 kbps) of operation.HSI2C can be configured to multiple master-transmitters and slave-receivers mode and multiple slave-transmitters and master-receivers mode.HSI2C also could be configured to generate DMA events to the DMA controller for transfer of data. The HSI2C driver library exports a set of APIs to configure and use HSI2C module for data transfers. The APIs are exported in /include/hsi2c.h

  • Features Not Supported
    • High speed data transfer
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