Part Number: PROCESSOR-SDK-AM335X

Tool/software: Code Composer Studio

Hi.,

I am doing gpio interrupt. it is not entering to ISR function 

i configured switch(external(in board)) as a gpio input, when i pressed switch interrupt register are updating but is not entering to ISR.

i did as below code flow ...please any one help me

int main(void)
{
Board_initCfg boardCfg;

boardCfg = BOARD_INIT_MODULE_CLOCK |
BOARD_INIT_PINMUX_CONFIG | BOARD_INIT_UART_STDIO;

// Initialize Board
status = Board_init(boardCfg);

// interrupt Initialize
INTCInit(0);
INTCEnableCpuIntr(INTC_ARM_IRQ_MASK);
INTCEnableIntr(interrupt_num);
INTCConfigIntr(interrupt_num, (IntrFuncPtr) gpioIsr, 0);

// GPIO Initialize
GPIO0ModuleClkConfig();
GPIO0Pin30PinMuxSetup();
GPIOModuleEnable(SOC_GPIO_0_REGS);
GPIOModuleReset(SOC_GPIO_0_REGS);
GPIODirModeSet(SOC_GPIO_0_REGS, GPIO_SW_PIN_NUMBER, 1);

// gpio interrupt Initialize
GPIOPinIntWakeUpEnable(SOC_GPIO_0_REGS, GPIO_INT_LINE_1, GPIO_SW_PIN_NUMBER);
GPIOIntTypeSet(SOC_GPIO_0_REGS,GPIO_SW_PIN_NUMBER, GPIO_INT_TYPE_RISE_EDGE);
GPIOPinIntEnable(SOC_GPIO_0_REGS, GPIO_INT_LINE_1, GPIO_SW_PIN_NUMBER);

void gpioIsr()
{

volatile uint32_t gpio_pin_value = 0;
appPrint("\n Interrupt occered\n\r");

/* Read pin*/
gpio_pin_value = GPIOPinRead(SOC_GPIO_0_REGS, GPIO_SW_PIN_NUMBER);

GPIOPinIntClear(SOC_GPIO_0_REGS, GPIO_INT_LINE_1, GPIO_SW_PIN_NUMBER);
appPrint("\n Interrupt is generated \n\r");

}

thanks in advance 

Regards 

chandana

Part Number: AM5728

Tool/software: Linux

Hello,

After several months working with prototypes based on AM5728 (Linux) and SATA disk connected via Marvell PCIe/SATA controllers we are not able to solve the problem we have regarding PCIe and disk identification when powering up.

Our system has the following block diagram:

When the system powers up with no errors and all disks are properly identified, the system works smoothly.

Our problem is that under certain circumstances (after a non-expected shut down), the following power up reports SATA errors in one or both PCIe interfaces

[    5.881123] ata2: SATA link down (SStatus 1 SControl 300)

[    6.203431] ata2: exception Emask 0x10 SAct 0x0 SErr 0x4040000 action 0xe frozen

[    6.210890] ata2: irq_stat 0x80000040, connection status changed

[    6.216927] ata2: SError: { CommWake DevExch }

[    6.221435] ata2: hard resetting link

[    8.470266] ata2: SATA link down (SStatus 1 SControl 300)

[    8.475805] ata2: EH complete

[    8.702997] ata2: exception Emask 0x10 SAct 0x0 SErr 0x4040000 action 0xe frozen

[    8.710471] ata2: irq_stat 0x80000040, connection status changed

[    8.716505] ata2: SError: { CommWake DevExch }

[    8.721010] ata2: limiting SATA link speed to 1.5 Gbps

[    8.726196] ata2: hard resetting link

[    9.360250] ata6: link is slow to respond, please be patient (ready=0)

[   10.950268] ata2: SATA link down (SStatus 1 SControl 310)

[   10.955781] ata2: EH complete

[   11.202575] ata2: exception Emask 0x10 SAct 0x0 SErr 0x4040000 action 0xe frozen

[   11.210032] ata2: irq_stat 0x80000040, connection status changed

[   11.216082] ata2: SError: { CommWake DevExch }

[   11.220623] ata2: limiting SATA link speed to 1.5 Gbps

[   11.225815] ata2: hard resetting link

[   13.460265] ata2: SATA link down (SStatus 1 SControl 310)

[   13.465718] ata2: EH complete

[   13.630303] ata1: softreset failed (1st FIS failed)

[   13.690758] ata4: softreset failed (1st FIS failed)

[   23.630735] ata1: softreset failed (1st FIS failed)

[   23.691169] ata4: softreset failed (1st FIS failed)

[   58.630299] ata1: softreset failed (1st FIS failed)

[   58.635207] ata1: limiting SATA link speed to 3.0 Gbps

[   58.690576] ata4: softreset failed (1st FIS failed)

[   58.695481] ata4: limiting SATA link speed to 3.0 Gbps

[   63.640577] ata1: softreset failed (1st FIS failed)

[   63.645590] ata1: reset failed, giving up

[   63.700850] ata4: softreset failed (1st FIS failed)

[   63.705756] ata4: reset failed, giving up

Sometimes dmesg shows the the PCIe lane does not link up.

[ 1.882257] dra7-pcie 51800000.pcie: phy link never came up

Can anyone answer to this very concise question?

-          When powering up the system, why does it matter how it was previously closed? Does CPU PCIe host keep a state machine or is any information stored?

We are really stuck with this issue since our system can power up without working hard disk.

Many thanks,

Jorge 

Part Number: TMS320C6657

Tool/software: Code Composer Studio

hello
I am working on c6657
I dont know why I can't use channel B in upp.
channel A is ok  in Rx and Tx .
I configure chB as same as CHA with changing of DMA I to DMA Q
but it doesnt work
regards

Part Number: AM5718

In our custom board we use different from IDK Gigabit PHYs. Latest kernel from Linux PDK 06.00.00.07-rt while booting tells that PHY uses POLL mode instead of interrupt. I booted the original kernel and device tree from PDK on AM571x-IDK board and found exactly the same:

Linux version 4.19.38-rt19-g1224cd679e (oe-user@oe-host)
Micrel KSZ9031 Gigabit PHY 48485000.mdio:00: attached PHY driver [Micrel KSZ9031 Gigabit PHY] (mii_bus:phy_addr=48485000.mdio:00, irq=POLL)

Can anybody explain why IRQ is not used? It really seems to be unused because on custom board we can cut off the IRQ line and have exactly the same working system and Ethernet.

Hi TDA4 Team,

I'm following the Vision Apps User Guide, under the "Run Step 3" section of "Build and Run" to create an SD card with the RTOS SDK. I'm instructed to run "make linux_fs_install_sd", but when I do I receive the below error:

How can I resolve this?

Thanks,
Barend

Part Number: TDA2SX

Tool/software: Code Composer Studio

Hi,

For my custom board, I am doing pinmuxing for TDA2xx SOC.

I did pinmux in uboot mux_data and device tree also changed.

I did pinmuxing (Bsp_boardSetPinMuxTda2xx function) for 3 Camera's using in my custom board. However, VIP/DSS/I2C/UART pinmuxing did here. For this, i comment the DSS, UART, I2C except VIP and tried. Capture and Display working fine.

My question is whether mux_data will take care ?? no need of remuxing here ??

Could you please let me know,

1) why is that mentioned ? was it useful anywhere ?

2) For all 3 cameras, is there any device tree changes needed  ?

Regards,

ARUNKUMAR V N

Part Number: TMS320DM368

Hi,

Recently i received my TMS320DM368.

When I'm using "decode" example application, it's decoding at 22 fps the davincieffect.264 video file (and also some other h264 files I own).

I display the videos through the component output.

Please help me to understand if there is something that I'm missing or not doing right.

Thank you very much.

Part Number: AM5718

Tool/software: Linux

Considering AM5718 for all its features, but can the DDR be more than 2GB, at least 4GB?  

Is this a good part to start a new design or should I be considering another part?

Team,

My customer is looking for SPI or I2C based devices that support some or all of the following:

TPM type security

                Crypto engine

                Serial number

                Large (100+MB) memory area

Do we have anything like this?

Thank you.

Part Number: AM3358

Hello,

I am using the Linux SDK 06.00.00.07 which has Remoteproc and RPMsg. I understand Remoteproc is used to activate firmware from the userspace, and RPMsg is to send small sized messages between the ARM and PRU, such as interrupts. My question is this, if anyone has any advice:

Instead of using RPMsg to tell me when an interrupt happens, can I just do a while(waiting for interrupt from firmware)? For instance, let's say an interrupt fires at memory address 0x49000001 once a DMA is done filling a buffer. When the interrupt fires at memory address 0x49000001 in the PRU, can I do a while(waiting for interrupt at memory address 0x49000001) in the ARM if I make sure to redefine any memory addresses from the PRU in the ARM? I'm just not sure if ARM can "see" the interrupts without using RPMsg.

Best Regards,

Tyler

Part Number: AM5728

Hello,

I am porting an app from x86 to AM57xx. The app depends on guile-2.0 libs. So I need to add guile-2.0-libs to the TI Processor SDK Linux image. The beagleboard X15 is used for this experiment. The SD card is created using the create-sdcard.sh from ti-processor-sdk-linux-am57xx-evm-05.02.00.10 based on the image tisdk-rootfs-image-am57xx-evm.

First approach - Get a prebuilt guile libs package to install it on the SD card
I downloaded the following deb for guile lib and the necessary dependent lib from Debian:
   guile-2.0-libs_2.0.11+1-9+deb8u1_armhf.deb, libgc1c2_7.2d-6.4_armhf.deb, libunistring0_0.9.3-5.2+b1_armhf.deb
Extract the deb content and copy them to the SD card, the guile lib has its own command-line app guile, so I just run it and got the following error:

root@am57xx-evm:~# /usr/lib/arm-linux-gnueabihf/guile-2.0/bin/guile
Throw without catch before boot:
Throw to key
Error while printing exception:
Key:
Failed to print exception.
Aborting.
Aborted (core dumped)

I actually tried the same guile lib deb on another SD card created from the Debian's 9.5 2018-10-07 4GB SD LXQT image for beagleboard X15 https://beagleboard.org/latest-images

The guile command-line app works fine on this SD card. So it looks like the guile lib from Debian may have some dependency and/or installation issue on the TI Arago image, but I can’t pinpoint the cause.
It may be necessary to use the TI SDK to build to guile lib from the source code.

Second Approach – build guile lib from source using TI SDK.

I try to find any existing recipe to build guile-2.0. I searched arago, yoctor and openembedded repositories, but couldn’t find a recipe for building guile for arm target. The closest one is the following guile_2.0.11.bb in Yocto index: https://git.yoctoproject.org/cgit/cgit.cgi/poky/commit/?h=dizzy&id=894df445fa71a170397c6e0b4960a89ef20a4230

However this recipe is to build a “native” guile for host, not for target.

I am new to AM57xx and Arago/Yocto, any insight and direction will be appreciated.

Regards,

Steve

Part Number: AM5728

Hello,

We made a board and we did not use DDR (D2516EC4BXGGB, Kingston) used in AM572x Evaluation Module (TMDSEVM572X).

Instead, mt41k256m16tw-107 (Mircon) was used.
I used four 4Gbs just like the EVM board.

When I connect JTEG and check the Memory Browser, the data of some addresses is constantly changing.

When DDR changes, I wonder if the gel file needs to change.
The gel file I'm currently using is the default gel file (ccsv7 \ ccs_base \ emulation \ boards \ am572x \ gel)

How can I solve it?
I would appreciate it if you could tell me how.

If I need to change the gel file, I would like to attach the mt41k256m16tw-107 (Mircon) gel file for AM5728.

I am currently using without OS.

please answer me.
Thank you.

Part Number: AM3352

Tool/software: TI C/C++ Compiler

Hi Team,
How to enable watchdog on u-boot?
How to test it on u-boot?

SDK version: ti-processor-sdk-linux-am335x-evm-05.02.00.10
EVM : AM335x Starter kit or Beaglebone black

Part Number: PROCESSOR-SDK-TDAX

Dear  Sir,

We plan to use eMMC as a storage to store some important files(not booting device).

How can I enable the MMC driver in kernel? device tree?

Are there any documents or example codes for eMMC access? 

Part Number: TDA2EVM5777

Hi.

I'm woking make new link.

 PREVLINK -> NEW LINK

- send a one queue with 4 channel

- new link get input buffer using SystemBuffer.

I want access each channel data but i didn't found how to access.

So. how can i access each channel's data from SystemBuffer?

Regards,

Lee.

Part Number: TDA2PXEVM

Hi,

I try to feed image data to tidl_OD from 1CH ISS Capture.I modify chains_tidlOD.txt to change chains below.

UseCase: chains_tidlOD

IssCapture -> IssM2mIsp -> IssM2mSimcop

IssM2mIsp -> Alg_IssAewb

IssM2mIsp -> Alg_SceneObstructionDetect (IPU1_0)

Alg_SceneObstructionDetect -> Null

IssM2mSimcop -> Alg_tidlpreproc (A15)

Alg_tidlpreproc (A15) -> Alg_tidl_Eve1 (EVE1)
Alg_tidlpreproc (A15) -> Alg_tidl_Eve2 (EVE2)

Alg_tidl_Eve1 (EVE1) -> Merge_OD (DSP1)
Alg_tidl_Eve2 (EVE2) -> Merge_OD (DSP1)

Merge_OD (DSP1) -> Alg_tidl_Dsp (DSP1) -> Merge

Merge -> Sync -> Alg_tiop (DSP1) -> Alg_ObjectDraw -> Display

GrpxSrc -> Display_Grpx

I regenerate the usecase and recompile the appimage and run it. An assertion failed happened.Here is the log.

[IPU1-0]  TIDL Usecases
[IPU1-0]  ---------------
[IPU1-0]  1: TIDL File I/O Usecase
[IPU1-0]  2: Semantic Segmentation Usecase
[IPU1-0]  3: TIDL OD Usecase
[IPU1-0]  
[IPU1-0]  x: Exit 
[IPU1-0]  
[IPU1-0]  Enter Choice: 
[IPU1-0]  
[IPU1-0]     25.387024 s:  
[IPU1-0]     25.426798 s:  TIDL Configuration parameters
[IPU1-0]     25.426889 s:  -----------------------------
[IPU1-0]     25.426950 s:  inputWidth         = 768
[IPU1-0]     25.427011 s:  inputHeight        = 320
[IPU1-0]     25.427072 s:  inputFile          = inData_OD
[IPU1-0]     25.427133 s:  inputFile          = inHeader_OD
[IPU1-0]     25.427194 s:  netFileName        = tidl_net_jdetNet_ssd.bin
[IPU1-0]     25.427255 s:  paramFileName      = tidl_param_jdetNet_ssd.bin
[IPU1-0]     25.427316 s:  inputfps           = 30
[IPU1-0]     25.427377 s:  threshold          = 0.300000
[IPU1-0]     25.427499 s:  -----------------------------
[IPU1-0]     29.287988 s:  ISSCAPTURE: Create in progress !!!
[IPU1-0]     29.369669 s:  ISSCAPTURE: Create Done !!!
[IPU1-0]     29.370035 s:  ISSM2MISP: Create in progress !!!
[IPU1-0]     29.434270 s:  ISSM2MISP: Create Done !!!
[IPU1-0]     29.434453 s:  ALGORITHM: Create in progress (algId = 6) !!!
[IPU1-0]     29.435033 s:  ALGORITHM: Create Done (algId = 6) !!!
[IPU1-0]     29.435521 s:  ALGORITHM: Create in progress (algId = 3) !!!
[IPU1-0]     29.467150 s:  ALGORITHM: Create Done (algId = 3) !!!
[IPU1-0]     29.467333 s:  ISSM2MSIMCOP: Create in progress !!!
[IPU1-0]     29.549106 s:  UTILS: DMA: Allocated CH (TCC) = 48 (48)
[IPU1-0]     29.549228 s:  UTILS: DMA: 0 of 1: Allocated PaRAM = 48 (0x63304800)
[IPU1-0]     29.550722 s:  ISSM2MSIMCOP: Create Done !!!
[IPU1-0]     29.551088 s:  IPC_OUT_0   : Create in progress !!!
[IPU1-0]     29.551393 s:  IPC_OUT_0   : Create Done !!!
[HOST  ]     29.551576 s:  IPC_IN_0   : Create in progress !!!
[HOST  ]     29.551881 s:  IPC_IN_0   : Create Done !!!
[HOST  ]     29.552095 s:  ALGORITHM: Create in progress (algId = 12) !!!
[HOST  ]     29.562801 s:  UTILS: DMA: Allocated CH (TCC) = 0 (0)
[HOST  ]     29.562801 s:  UTILS: DMA: 0 of 1: Allocated PaRAM = 0 (0x43305600)
[HOST  ]     29.562831 s:  ALGORITHM: Create Done (algId = 12) !!!
[HOST  ]     29.562923 s:  IPC_OUT_1   : Create in progress !!!
[HOST  ]     29.562953 s:  IPC_OUT_1   : Create Done !!!
[EVE2  ]     29.563228 s:  IPC_IN_0   : Create in progress !!!
[EVE2  ]     29.564112 s:  IPC_IN_0   : Create Done !!!
[EVE2  ]     29.564692 s:  ALGORITHM: Create in progress (algId = 14) !!!
[HOST  ]     31.353840 s:  IPC_OUT_0   : Create in progress !!!
[HOST  ]     31.353870 s:  IPC_OUT_0   : Create Done !!!
[DSP1  ]     31.353260 s:  IPC_IN_1   : Create in progress !!!
[DSP1  ]     31.353718 s:  IPC_IN_1   : Create Done !!!
[EVE1  ]     31.354145 s:  IPC_IN_0   : Create in progress !!!
[EVE1  ]     31.354999 s:  IPC_IN_0   : Create Done !!!
[EVE1  ]     31.355578 s:  ALGORITHM: Create in progress (algId = 14) !!!
[EVE2  ]     31.351613 s:  ALGORITHM: Create Done (algId = 14) !!!
[EVE2  ]     31.352376 s:  IPC_OUT_0   : Create in progress !!!
[EVE2  ]     31.352833 s:  IPC_OUT_0   : Create Done !!!
[DSP1  ]     33.142865 s:  IPC_IN_0   : Create in progress !!!
[DSP1  ]     33.143323 s:  IPC_IN_0   : Create Done !!!
[DSP1  ]     33.143658 s:  ALGORITHM: Create in progress (algId = 36) !!!
[DSP1  ]     33.151375 s:  ALGORITHM: Create Done (algId = 36) !!!
[DSP1  ]     33.151558 s:  IPC_OUT_0   : Create in progress !!!
[DSP1  ]     33.151619 s:  IPC_OUT_0   : Create Done !!!
[DSP1  ]     33.154395 s:  IPC_IN_2   : Create in progress !!!
[DSP1  ]     33.154822 s:  IPC_IN_2   : Create Done !!!
[DSP1  ]     33.154974 s:  ALGORITHM: Create in progress (algId = 39) !!!
[DSP1  ]     33.156652 s:  ALGORITHM: Create Done (algId = 39) !!!
[DSP1  ]     33.156835 s:  IPC_OUT_1   : Create in progress !!!
[DSP1  ]     33.156896 s:  IPC_OUT_1   : Create Done !!!
[EVE1  ]     33.141218 s:  ALGORITHM: Create Done (algId = 14) !!!
[EVE1  ]     33.142011 s:  IPC_OUT_0   : Create in progress !!!
[EVE1  ]     33.142469 s:  IPC_OUT_0   : Create Done !!!
[IPU1-0]     33.151741 s:  IPC_IN_0   : Create in progress !!!
[IPU1-0]     33.152809 s:  IPC_IN_0   : Create Done !!!
[IPU1-0]     33.153907 s:  IPC_OUT_1   : Create in progress !!!
[IPU1-0]     33.154212 s:  IPC_OUT_1   : Create Done !!!
[IPU1-0]     33.156987 s:  IPC_IN_1   : Create in progress !!!
[IPU1-0]     33.158055 s:  IPC_IN_1   : Create Done !!!
[IPU1-0]     33.158238 s:  ALGORITHM: Create in progress (algId = 1) !!!
[IPU1-0]     33.158665 s: NULL value is:0x0,addr ,width or height wrong,addr:0xffff,width:768,height:320,pitch:0
[IPU1-0]     33.158848 s: Draw2D_setBufInfo return status:-7
[IPU1-0]     33.158939 s:  Assertion @ Line: 270 in objectdetection/objectDrawLink_algPlugin.c: status == SYSTEM_LINK_STATUS_SOK : failed !!!
[IPU1-0]     33.159488 s:  Assertion @ Line: 270 in objectdetection/objectDrawLink_algPlugin.c: status == SYSTEM_LINK_STATUS_SOK : failed !!!

Question:

1.I first develope the TI processor. I don't know the chains I modify is correct ?

2.I found it's because the pitch is 0 cause the assertion failed.So how do I debug this ?

Regards

Wall-E

We want to adapt more power processer, better than c6678 chip, in our device in order to execute more complex algorithm. Does TI have the release time line for the product C71xx?

Part Number: AM3359

Tool/software: Code Composer Studio

Hi .can we use ICE335X (Sitara processor) master as well as slave for ethernet. I mean I want to use ICE335X (one board)  as a master and another ICE 335X (2nd board) as a slave for ethernet(ECAT).

THANKS IN ADVANCE...

Regards

Rock

Part Number: PROCESSOR-SDK-OMAPL138

Hello,

I am already developed a data logger using TMS320C6748 DSP processor. I used processor sdk in windows laptop with code composer studio 8. Also I am able to put my application in boot.

Now I need to replace the TMS320C6748 with OMAPL138 processor, I need to run applications running in  ARM and DSP separately and  data should transferred between the processors using IPC.

Can I do this using the windows laptop with code composer studio 8? or I require a Linux laptop to program ARM processor with linux os installed?

Is there any document available for this so that I can follow the steps.

Thanks & regards

Navaneetha krishnan

Part Number: AM3354

Dear  Sir/Madam,

                 I am working on AM335X,I have to know does it support ROS(robot operating system),if suport could you please share how to implemet ROS on am335x.

Thanks & Regards,

Balaji.P