Part Number: TCI6638K2K
We want to handle AIF2 AT event at ARM Corepac which is running linux OS. From the TCI6638K2K document SPRS836G (page 103) we are seeing AIF_ATEVT[0-7] mapped to system event 408-415. Now how do we register an interrupt handler for these events at linux. Any pointers on how this is done or an example code will be really helpful.
regards
Ananth
Part Number: AM6548
Hi
like to know if we have any documentation that shows how to migrate from sdk 5.03 to sdk 6.x for the AM6548.
The main reason we are looking at this is for the EHRPWM that is supported in sdk 6.x? There are new config variables that are added in SDK 6.x for this peripheral.
Thanks
Regards
Mohsen
Part Number: TMS320C6748
Hi,
Does the Debug GEL file mentioned in the link http://www.ti.com/lit/an/spracm8/spracm8.pdf still available? There are no diagnostics info like:
• ROM ID: Revision number of the boot ROM • Silicon revision number
• Boot Mode: Current boot mode, as selected by the boot pins latched at reset
• ROM Status Code: Current status of the ROM code
• Description: Description of any error messages that the ROM may have encountered during boot
• Program Counter: The current program counter of the connected device ( or DSP)
• Device Information: Generic device information that may be helpful when getting support from TI
• Clock information: PLLm_SYSCLKn is output
in CCS_INSTALL_PATH\ccs_base\emulation\boards\evmc6748\gel.
Part Number: AM5706
Hello,
I am trying to boot Linux. I have loaded spl and u-boot parts, but when u-boot is trying to load Linux the process hungs. I suppose the problem is an attemption using UART9 instead of UART3.
I have changed the Kconfig.debug file which lie in /arc/arm by the next way.
+config DEBUG_OMAP5UART9
+ bool "Kernel low-level debugging messages via OMAP5 UART9"
+ depends on ARCH_OMAP2PLUS
+ select DEBUG_UART_8250
config DEBUG_UART_PHYS
+ default 0x48424000 if DEBUG_OMAP5UART9
config DEBUG_UART_VIRT
+ default 0xfa424000 if DEBUG_OMAP5UART9
And in the .config file I see this changes, but the program hangs at the next place
80c42404: E59F1018 ldr r1, [pc, #0x18]
80c42408: E59F2018 ldr r2, [pc, #0x18]
80c4240c: E5C10000 strb r0, [r1]
-----------------------Start cycle---------------------
80c42410: E5D13014 ldrb r3, [r1, #0x14]
80c42414: E2033060 and r3, r3, #0x60
80c42418: E3330060 teq r3, #0x60
80c4241c: 1AFFFFFB bne #0x80c42410
----------------------End cycle------------------------
80c42420: E1A0F00E mov pc, lr
80c42424: 48020000 .word 0x48020000
And r1 keeps 0x48020000 instead of my 0x48424000. I suppose, this part of code related to the 8250.S file.
.macro busyuart,rd,rx
1002: load \rd, [\rx, #UART_LSR << UART_SHIFT]
and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE
teq \rd, #UART_LSR_TEMT | UART_LSR_THRE
bne 1002b
.endm
But I have no idea, how to force it use my address.
Part Number: AM3352
Dear support team,
I am currently evaluating the requirements for an external software.
The software is intended to run on a customized board with a AM3352 device using TI RTOS + NDK.
External software requirements:
[...]
It has been tested on Windows, Linux and Windows CE and porting to any POSIX system supporting sockets, at least two threads and some kind of mutexes should be a non-issue.
[...]
I have found the TI wiki document regarding POSIX here:
processors.wiki.ti.com/.../BIOS_POSIX_Thread_(pthread)_Support
So it seems the threads and mutexes shouldn't be a problem.
Regarding (BSD/POSIX) sockets I have found some content in your NDK guide "SPRU523".
It says the NDK does have "BSD like" functions ("NDK_*") but to use "pure" BSD sockets, the "SimpleLink SDK" has to be used.
My questions are:
1) Do the "NDK_*()" functions provide POSIX compatibility?
If no:
2) Is the "SimpleLink SDK" available for AM3352/AM335x devices on customized boards?
(as far as I have investigated, it seems to be coupled to various board hardware - but maybe I'm wrong?)
3) Does the "SimpleLink SDK" work with TI RTOS?
Thank you,
Markus
Part Number: TMDSIDK437X
Tool/software: Code Composer Studio
hello,
I want to debug the u-boot on an IDK AM437x. I followed the training serie about debugging the u-Boot in CCS but it still doesn't work. What I do is :
-I connect to the Cortex A9
-I do a CPU reset and verify that Thumb mode is off
-I load the : U-boot-spl.bin (load memory) at the address 0x402f4000 with type-size 32bits
-I load the symbol : u-boot-spl
-I run the programm : u-boot
I generated the u-boot by doing the following :
- make CROSS_COMPILE=arm-linux-gnueabihf- distclean
- make CROSS_COMPILE=arm-linux-gnueabihf- O=My_Uboot am43xx_evm_defconfig
- make CROSS_COMPILE=arm-linux-gnueabihf- O=My_Uboot
I also tried with adding the offset from relocaddr that is given when we interrupt the booting process (0xbff51000). It always end up at bootstage_error() in bootstage.h (add: 0x80846eac)
the boot does work I just want to know how to debug it in order to do the same with a custom board.
Any idea on what I am doing wrong ?
I am using sdk linux-rt 06.00.00.07
Regards,
Gilles
Part Number: DRA744
Hi everybody ,
I m in Android 4.3 and using a WIFI module attached via SDIO signals .
WIFI module can work @ 3.3 V or 1.8V SDIO IO signals , and I am on eMMC1 .
now using signals @ 3.3V everything is fine . if I use 1.8V level ( with proper settings etc ) module is not working .
what I noticed using a scope --> no signal or bus activity by DRA744 at all , all signals are stuck if IO are set @ 1.8V
I noticed in TRM you need to start @ 3.3 V on IO on SDcard ( it is in table 25-2 ) : is this needed also for SDIO ? ( in the TRM it seems not ..)
please where am I wrong ?
best regards
Carlo
Part Number: AM3352
Dear Sitara champs,
Consider the following diagram of a use case using the dual port switch on the AM3352.
There's an AM3352 Sitara board with a WLAN/BT module on it. There's another board we'll call the other module which has a microprocessor on it running an Ethernet stack. The question is, can we do the following?
Can the other module access both the WLAN on the Sitara board *and* access the network camera? If so, how would we go about setting this up from the Linux side of things running on Sitara? Does the AM3352 assign IP addresses to the other module and the camera?
Thanks
Part Number: PROCESSOR-SDK-AM335X
We used BeagleBone black for development and were able to load SPL and uboot via UART. When I try to load that same SPL via UART to our new hardware. it freezes (ie crashes). I connected a Blackhawk JTAG to our board and used Code Composer Studio to step through the code. Seems to crash when setting up I2C clocks? I removed a lot of the init code under */board/ti/am335x/board.c including . It still crashes.
I build uboot using
make -j 2 -C $(UBOOT_SOURCE_DIR) am335x_evm_config
make -j 2 -C $(UBOOT_SOURCE_DIR) CROSS_COMPILE=$(CROSS_COMPILE) CONFIG_MKIMAGE_DTC_PATH=$(UBOOT_SOURCE_DIR)/scripts/dtc/dtc
I don't understand why the default SPL build for Beaglebone would crash. Even if the peripherals aren't connected it shouldn't crash.
When I just have it pinmux for UART0 and setup our DDR2 timing, it still crashes.
Is there something i should be doing differently? Is there someway to debug the reason for crashing? Enabling debug printing from within SPL code?
Thanks for any help!
My customer had the the following questions upon their review of our TDA4 SOM:
o Oscillator capacitor values appear out of specification for oscillator Y1 (22.5792MHz) based on design. (TDA4x_SR1.0_DM.pdf pg 172 indicates a range of 12-24pF for each load capacitor. However, the TI design shows 30pF components. Is there a reason for this?
o LPDDR4 vs 4x? What was the decision? Reason is customer is thinking about depop parts not installed in design.
o Why was power domain for RGMII 3.3V?
o Was there a signal integrity simulation run on the layout? Is there any information here for review?
o Is there any other SOM design collateral available – design implementation notes, supply calcs or simulation (WEBENCH), etc on CDDS or elsewhere?
o What is current concept for thermal design to protect the TDA4VM and SOM?
Part Number: AM5749
Hi guys,
We need to test the AM5729 or the AM5749, however I couldn't find an EVB that have those microprocessors mounted on.
Can you please tell if it is possible to order the evaluation boards for the AM572x and AM574x with the AM5729 and AM5749 respectively?
Thank you!
Patricio
Part Number: AM5728
Hi there,
I'm working with Linux processor-sdk 05.02.00.10 and RTOS processor-sdk 4.03.00.05.
I successfully worked with jailhouse hypervisor on the AM5728 evaluation board.
Now I'm trying to startup jailhouse on a AM5728 based custom board.
In my custom board pin F21 is pinmuxed to be GPIO6_16. When the RTOS inmate is launched this gpio is set to '1' by some peripheral.
On the Linux side a registered interrupt starts running:
165: 0 0 4805d000.gpio 16 Level palmas
I think this interrupt is triggered by GPIO6_16 because after exporting gpio144 on the linux side I get:
# cat /sys/kernel/debug/gpio
.......
gpiochip4: GPIOs 128-159, parent: platform/4805d000.gpio, gpio:
gpio-144 ( |sysfs ) in lo IRQ
.....
After the RTOS inmate is launched the pin is set to high and the interrupt is running.
and once the interrupt count reaches 100001:
[ 1424.726062] irq 165: nobody cared (try booting with the "irqpoll" option)
[ 1424.726070] CPU: 0 PID: 34 Comm: irq/41-4805d000 Tainted: G O 4.14.79-rt47-gd9200ca684 #18
[ 1424.726073] Hardware name: Generic DRA74X (Flattened Device Tree)
[ 1424.726075] Backtrace:
[ 1424.726096] [<c010b808>] (dump_backtrace) from [<c010baec>] (show_stack+0x18/0x1c)
[ 1424.726102] r7:000000a5 r6:200f0093 r5:00000000 r4:c0d57560
[ 1424.726111] [<c010bad4>] (show_stack) from [<c082207c>] (dump_stack+0x90/0xa4)
[ 1424.726120] [<c0821fec>] (dump_stack) from [<c01837b8>] (__report_bad_irq+0x30/0xd4)
[ 1424.726126] r7:000000a5 r6:d4b27a00 r5:00000000 r4:d4b27a00
[ 1424.726133] [<c0183788>] (__report_bad_irq) from [<c0183bf0>] (note_interrupt+0x270/0x2bc)
[ 1424.726139] r9:600f0013 r8:00000001 r7:000000a5 r6:d4b27a00 r5:00000000 r4:d4b27a00
[ 1424.726147] [<c0183980>] (note_interrupt) from [<c0180cb0>] (handle_irq_event_percpu+0x74/0x80)
[ 1424.726152] r10:00000000 r9:600f0013 r8:00000001 r7:00000002 r6:d4b27a00 r5:00000000
[ 1424.726155] r4:00000000 r3:00000000
[ 1424.726161] [<c0180c3c>] (handle_irq_event_percpu) from [<c0180d3c>] (handle_irq_event+0x80/0xb8)
[ 1424.726166] r7:d4a60468 r6:d4a60410 r5:d4b27a70 r4:d4b27a00
[ 1424.726172] [<c0180cbc>] (handle_irq_event) from [<c018472c>] (handle_level_irq+0xb0/0x194)
[ 1424.726177] r7:d4a60468 r6:d4a60410 r5:d4a60464 r4:d4b27a00
[ 1424.726183] [<c018467c>] (handle_level_irq) from [<c017fdb0>] (generic_handle_irq+0x2c/0x3c)
[ 1424.726186] r5:d4a60464 r4:00000010
[ 1424.726194] [<c017fd84>] (generic_handle_irq) from [<c04329e8>] (omap_gpio_irq_handler+0x108/0x15c)
[ 1424.726201] [<c04328e0>] (omap_gpio_irq_handler) from [<c0181dd8>] (irq_forced_thread_fn+0x28/0x7c)
[ 1424.726206] r10:c0181db0 r9:d4a43340 r8:d4a38400 r7:00000001 r6:00000000 r5:d4a38400
[ 1424.726208] r4:d4a43340
[ 1424.726214] [<c0181db0>] (irq_forced_thread_fn) from [<c0182130>] (irq_thread+0x130/0x208)
[ 1424.726219] r7:00000001 r6:00000000 r5:ffffe000 r4:d4a43364
[ 1424.726226] [<c0182000>] (irq_thread) from [<c0149368>] (kthread+0x164/0x16c)
[ 1424.726232] r10:d4871ac8 r9:c0182000 r8:d4a43340 r7:d4a72000 r6:00000000 r5:d4a43380
[ 1424.726233] r4:d49e3200
[ 1424.726241] [<c0149204>] (kthread) from [<c0107a90>] (ret_from_fork+0x14/0x24)
[ 1424.726246] r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c0149204
[ 1424.726248] r4:d4a43380
[ 1424.726252] handlers:
[ 1424.726257] [<c0180dc8>] irq_default_primary_handler threaded [<c056c164>] regmap_irq_thread
[ 1424.726269] Disabling IRQ #165
It seems like GPIO6_16 is set to high which causes this interrupt to run without being handled and then it is shutdown by the kernel.
I think it is related to some palmas driver.
I tried to disable GPIO6 in the device tree but then the kernel got stuck upon power up.
Can you direct me how to either disable this driver completely, or move the irq to a different gpio?
Or how can I disable this gpio6_16 in particular from triggering and interrupt in A15 core 0?
Thanks a lot,
Nir.
Part Number: AM5728
Tool/software: Code Composer Studio
Hi there,
I'm working with Linux processor-sdk 05.02.00.10 and RTOS processor-sdk 4.03.00.05.
I successfully worked with jailhouse hypervisor on the AM5728 evaluation board.
Now I'm trying to startup jailhouse on a AM5728 based custom board.
The RTOS inmate app is unable to access McSPI4 memory space.
Using CCS memory browser I can view the address space properly only when the memory browser is set to "Physical".
When it is set to "CPU" the address space is zeroed out.
Why is that?
Address spaces of McSPI1,2,3 are available when the memory browser is set both in "Physical" and "CPU", and the RTOS inmate can access them with no problem.
Thanks a lot,
Nir.
Part Number: AM6546
(I am asking this question on behalf of a customer)
Could TI please point out in TI's documentation information about 'how to read out diagnostic statuses' of the AM65xx/ DRA80M device during/after boot the Linux PDK? Important interest topics include:
Part Number: AM6548
Hi Community,
My project involves a PHY transreceiver, ( similar to - TI 83867) , i need some help with an RGMII driver. (linux OS)
The TI SDK provides a Driver for the 83867 that has included already the RGMII functionality.
Now I need just the RGMII driver for another brand PHY trans-receiver .
Can anyone help a new engineer, please!
Part Number: AM4378
Let's say I want to use two pins assigned to GPIO's on the same GPIO Bank (e.g.: gpio0).
One of these pins (e.g.: G24 = gpio0_7) is on the VDDSHV3 power domain, which is supplied by 1.8V.
The other pin (e,g.: D17 = gpio0_11) is on VDDSHV6 power domain, which is supplied by 3.3V.
When I set this up in the PinMux tool, it display a "Voltage conflict" warning.
Why do we get this warning? What is wrong with using two GPIO's in the same bank at different voltages?
There was a post with a somewhat similar type of question, where someone said the warning was a bug in the PinMux tool. Is this warning a tool bug?
Part Number: SYSBIOS
OMAP-L138, ARM runs sysbios, DSP runs sysbios.
Can ARM and DSP intercommunicate by syslink?
Thank you!
Hi,
I am currently working on zedboard. I want to implement multiple frequencies at 16 bit output of zedboard on FMC terminals. I have implemented multi-channel technique to achieve 10 frequencies starting from 1MHz upto 19MHz with 2MHz difference using DDS IP core (Clock freq = 384 MHz, from DAC 34H84 board). Each channel has Clock frequency of 384/10 = 38.4MHz. Frequencies appears on output in mixed form (i-e 1MHz to 19MHz ) and then repeating the frequency spectrum at multiple of 38.4MHz upto 384MHz. I applied Low-pass filter with cuttoff at 20MHz to attenuate the frequencies appearing on multiples of 38.4MHz, but result shown only two waves (1MHz and 2MHz). All other frequencies are attenuated.
Can someone suggest me a solution? or send some link where multiple frequencies are generated?
Thanks,
Shahzad Raza.
Part Number: AM6548
Hello Sir
Part Number: AM5708
Hello:
I am a new to use TIDL library, I meet something which confuses me.
When I convert the lenet(tensorflow) model to the .bin files which tidl can use,then it has message "Couldn't open inputParamsFile file: NA".How to resolve it?
Kindly do needful.
Thanks and Regards,