Quantcast
Channel: Processors forum - Recent Threads
Viewing all 17527 articles
Browse latest View live

RTOS/PROCESSOR-SDK-AM65X: How can I make the project of other peripherals for am65xx_idk?

$
0
0

Part Number:PROCESSOR-SDK-AM65X

Tool/software: TI-RTOS

Hi Team,

 

I only could make the following projects by pdkProjectCreate.bat with options.

Am65xx_evm projects are USB only...

Q1. How can I make the project of other peripherals for am65xx_idk easily?

Q2. How to modify USB project from am65xx_evm to am65xx_idk?

 

Project :

SaBasicExample_am65xx_idk_mcuExampleProject

SaBasicExample_am65xx_idk_mpuExampleProject

 

SDK : processor_sdk_rtos_am65xx_5_02_00_10

DPK : pdk_am65xx_1_0_3

OS : Windows7 64bit

CCS : Version: 8.3.0.00009

 

Thanks and Best regards,

Kuerbis


RTOS/PROCESSOR-SDK-AM65X: Build fail of the projects for am65xx_idk

$
0
0

Part Number:PROCESSOR-SDK-AM65X

Tool/software: TI-RTOS

Hi Team,

 

I made the following projects by pdkProjectCreate.bat with options and did build project in CCS. Then I got the error as bellow.

Would you please give me your advice?

 

Project :

SaBasicExample_am65xx_idk_mcuExampleProject

SaBasicExample_am65xx_idk_mpuExampleProject

 

SDK : processor_sdk_rtos_am65xx_5_02_00_10

DPK : pdk_am65xx_1_0_3

OS : Windows7 64bit

CCS : Version: 8.3.0.00009

EVM AM65xx_idk

 

Project :

SaBasicExample_am65xx_idk_mcuExampleProject

SaBasicExample_am65xx_idk_mpuExampleProject

 

< build fail of SaBasicExample_am65xx_idk_mpuExampleProject >

Building file: "C:/ti/pdk_am65xx_1_0_3/packages/ti/drv/sa/example/SaBasicExample/src/common/setuprm.c"

Invoking: GNU Compiler

"C:/ti/gcc-linaro-7.2.1-2017.11-i686-mingw32_aarch64-elf/bin/aarch64-elf-gcc.exe" -c -mcpu=cortex-a53+fp+simd -mtune=cortex-a53 -fno-exceptions -Dam6548 -Dcore0 -DAARCH64 -DSOC_AM6X -DUSE_BIOS -DBUILD_MPU -DNSS_LITE2 -Dam65xx_evm -DSOC_AM65XX -Dgcc -I"C:/ti/workspace/AM65x/processor_sdk_rtos_am65xx_5_02_00_10/workspace_v8/SaBasicExample_am65xx_idk_mpuExampleProject" -I"C:/ti/pdk_am65xx_1_0_3/packages/ti/drv/sa" -I"C:/ti/pdk_am65xx_1_0_3/packages/ti/drv/sa/example/SaBasicExample/src/" -I"C:/ti/pdk_am65xx_1_0_3/packages" -I"C:/ti/gcc-linaro-7.2.1-2017.11-i686-mingw32_aarch64-elf/aarch64-elf/include" -Og -g -gdwarf-3 -gstrict-dwarf -Wall -c -mabi=lp64 -mcmodel=large -Wno-int-to-pointer-cast -Wno-pointer-to-int-cast -MMD -MP -MF"setuprm.d" -MT"setuprm.o" @"configPkg/compiler.opt" -o"setuprm.o" "C:/ti/pdk_am65xx_1_0_3/packages/ti/drv/sa/example/SaBasicExample/src/common/setuprm.c"

subdir_rules.mk:80: recipe for target 'setuprm.o' failed

C:/ti/pdk_am65xx_1_0_3/packages/ti/drv/sa/example/SaBasicExample/src/common/setuprm.c:41:10: fatal error: ti/drv/rm/rm.h: No such file or directory

#include <ti/drv/rm/rm.h>

         ^~~~~~~~~~~~~~~~

compilation terminated.

gmake: *** [setuprm.o] Error 1

 

Thanks and Best regards,

 Kuerbis

DRA756: I2C1 clock high/low duty cycle did not match the setting.

$
0
0

Part Number:DRA756

Hi Expert:

Customer find that I2C1 clock output high and low did not match software setting.

I will affect PMIC configuration. I reproduce this problem at EVM board.

Does some register need special setting?

Software i use Processor SDK 3.04 and Test point it J6 EVM H version R681. Follow TRM Table 24-7 setting PSC to 9, SCLL to 7 and SCLH to 5.

Then read TPS659039 register, from the wave we can find output low is short time than output high. But calculate based on TRM, Low will be 12/9.6=1.25us.

High will be 12/9.6=1.25us.

Does my setting is not right?

Best Regards!

Han Tao  

=> md 0x480700b0
480700b0: 00000009 00000005 00000007 000001e0 ................
480700c0: 00004010 00000000 00000000 00000000 .@..............
480700d0: 00000000 00000000 00000000 00000000 ................
480700e0: 00000000 00000000 00000000 00000000 ................
480700f0: 00000000 00000000 00000000 00000000 ................
48070100: 0000080c 00005040 00000000 00000000 ....@P..........
48070110: 00000001 00000000 00000000 00000000 ................

TMS320C6657: IBL debugging in CCS failed

$
0
0

Part Number:TMS320C6657

Hi,

We have our own custom board, the board includes C6657 DSP. No FPGA nor I2C prom exist on the board.
I have build the iblInit and iblMain (after some modifications) in order to perform some debugging of the IBL step by step using the CCS.
We are using CCS9, the IBL is part of mcsdk_2_01_02_06.

1) after loading the iblInit_665x.out (or iblInit_665x_le.out) the code reached main succesfully. Then I'm running the script in the GEL file in order to initialize both ibl and iblStatus structures, its seems that both of them are initialized correctly.


2) when I'm running the code step by step and getting to the configureGPIO, and make a another step, the running is reached to hw_spi_xfer function.
configureGPIO function should only configure the GPIO pins related to UART and SPI and get back to the code.
Its seems that there is a mismatch beetween the compiled code and the one showed in the CCS debugger.
What can be the problem?

Here are  some images in order to clearify the issue.


 

Linux/AM5728: Accessing peripherals on the IDK boards

$
0
0

Part Number:AM5728

Tool/software: Linux

In the above thread, the solution has been provided for the EVM boards of AM5728, I was wondering if the same works for the Am5728 IDK board as well. I would like to access the GPIO, I2C, etc. of the IDK board

Compiler/66AK2E05: Setup cross compile environment for Linux application development

$
0
0

Part Number:66AK2E05

Tool/software: TI C/C++ Compiler

Hi ,

I would like to setup own compilation environment  without ccs for being able to cross compile linux process binary for arm A15 cores . This should be done as part of automated building procedure

on Linux (CentOS 7) machine

Typically I would need the following (??)

SYSROOT,TOOLCHAIN

So question is if within keystone k2e sdk (ti-processor-sdk-linux-k2e-evm-05.00.00.15) these are the correct paths:

- linux-devkit/sysroots/x86_64-arago-linux/   or

- linux-devkit/sysroots/armv7ahf-neon-linux-gnueabi or none of these 2 ?

Then to "override" the host machine compilation tools/environment for example like this:

make CC="arm-linux-gnueabihf-gcc --sysroot=$SYSROOT -I=/usr/include -L=/usr/lib"

MOreover how can we setup as such for DSP core for TI-RTOS ?

RTOS/AM5728: dspdce-fw error for TISDK 05_02_00_10 for evm board

$
0
0

Part Number:AM5728

Tool/software: TI-RTOS

I am using am57xx-evm board.  when I use MACHINE=am57xx-evm bitbake dspdce-fw is gives an error below.

ERROR: dspdce-fw-1.00.00.07-r4 do_compile: Function failed: do_compile (log file is located at /home/user/yocto/src_AM57XX/yocto_ti/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/dspdce-fw/1.00.00.07-r4/temp/log.do_compile.10281)
ERROR: Logfile of failure stored in: /home/user/yocto/src_AM57XX/yocto_ti/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/dspdce-fw/1.00.00.07-r4/temp/log.do_compile.10281
Log data follows:
| DEBUG: Executing shell function do_compile
| export XDCARGS="profile=release trace_level=0 hw_type=VAYU hw_version=ES10 BIOS_type=non-SMP"; \
| /home/user/yocto/src_AM57XX/yocto_ti/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/dspdce-fw/1.00.00.07-r4/recipe-sysroot/usr/share/ti/ti-xdctools-tree/xdc --jobs=1 -PD /home/user/yocto/src_AM57XX/yocto_ti/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/dspdce-fw/1.00.00.07-r4/git/platform/ti/dce/baseimage/.
| /bin/sh: line 1: /home/user/yocto/src_AM57XX/yocto_ti/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/dspdce-fw/1.00.00.07-r4/recipe-sysroot/usr/share/ti/ti-xdctools-tree/xdc: No such file or directory
| Makefile:112: recipe for target 'build' failed
| make: *** [build] Error 127
| WARNING: /home/user/yocto/src_AM57XX/yocto_ti/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/dspdce-fw/1.00.00.07-r4/temp/run.do_compile.10281:1 exit 2 from 'make dspbin'
| ERROR: Function failed: do_compile (log file is located at /home/user/yocto/src_AM57XX/yocto_ti/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/dspdce-fw/1.00.00.07-r4/temp/log.do_compile.10281)
ERROR: Task (/home/user/yocto/src_AM57XX/yocto_ti/sources/meta-ti/recipes-bsp/dspdce-fw/dspdce-fw_git.bb:do_compile) failed with exit code '1'
NOTE: Tasks Summary: Attempted 804 tasks of which 796 didn't need to be rerun and 1 failed.

Summary: 1 task failed:
  /home/user/yocto/src_AM57XX/yocto_ti/sources/meta-ti/recipes-bsp/dspdce-fw/dspdce-fw_git.bb:do_compile
Summary: There were 8 WARNING messages shown.
Summary: There was 1 ERROR message shown, returning a non-zero exit code.

CCS/AWR1843BOOST: SPIB ChipSelect[0/1/2] switching dosenot work

$
0
0

Part Number:AWR1843BOOST

Tool/software: Code Composer Studio

hi

I want to connect 3 devices to SPI_Bport and switch control with ChipSelect[0/1/2].
I tried SPI Read while switching ChipSelect CS0/CS1/CS2, but CS0 is always enabled. CS1 and CS2 doesnot work.

Steps
1. Enable SPIB pin settings
  refer : [Pin_Map] and [Pin_MuxSetting]
2. Set SPI parameters.
 refer : [Parameter_Setting]
3. Try to access CS0/CS1/CS2 with SPI_Read command
 a. SPI_Read with CS=0
 b. SPI_Read with CS=1
 c. SPI_Read with CS=2
 Repeat a>b>c.
 refer : [TestCode]
4. As a result of checking the waveform, CS0 is always enabled. Even if it accessed CS1/CS2.

Are there any problems with the procedure for test steps?
or Is there any other root cause?

----------------------------------------------------
Pin_Map
----------------------------------------------------

SPIB-CLK  : F14
SPIB-CS0  : H14
SPIB-CS1  : P13
SPIB-CS2  : J13
SPIB-MOSI : F13
SPIB-MISO : G14

----------------------------------------------------
Pinmux_Setting
----------------------------------------------------

//SPIBCLK 
Pinmux_Set_OverrideCtrl(SOC_XWR18XX_PINF14_PADAJ, PINMUX_OUTEN_RETAIN_HW_CTRL, PINMUX_INPEN_RETAIN_HW_CTRL);
Pinmux_Set_FuncSel(SOC_XWR18XX_PINF14_PADAJ, SOC_XWR18XX_PINF14_PADAJ_SPIB_CLK);
//SPIB CS0
Pinmux_Set_OverrideCtrl(SOC_XWR18XX_PINH14_PADAK, PINMUX_OUTEN_RETAIN_HW_CTRL, PINMUX_INPEN_RETAIN_HW_CTRL);
Pinmux_Set_FuncSel(SOC_XWR18XX_PINH14_PADAK, SOC_XWR18XX_PINH14_PADAK_SPIB_CSN);
//SPIB CS1
Pinmux_Set_OverrideCtrl(SOC_XWR18XX_PINP13_PADAA, PINMUX_OUTEN_RETAIN_HW_CTRL, PINMUX_INPEN_RETAIN_HW_CTRL);
Pinmux_Set_FuncSel(SOC_XWR18XX_PINP13_PADAA, SOC_XWR18XX_PINP13_PADAA_SPIB_CSN1);
//SPIB CS2
Pinmux_Set_OverrideCtrl(SOC_XWR18XX_PINJ13_PADAC, PINMUX_OUTEN_RETAIN_HW_CTRL, PINMUX_INPEN_RETAIN_HW_CTRL);
Pinmux_Set_FuncSel(SOC_XWR18XX_PINJ13_PADAC, SOC_XWR18XX_PINJ13_PADAC_SPIB_CSN2);
// SPIB MISO
Pinmux_Set_OverrideCtrl( SOC_XWR18XX_PING14_PADAI, PINMUX_OUTEN_RETAIN_HW_CTRL, PINMUX_INPEN_RETAIN_HW_CTRL );
Pinmux_Set_FuncSel( SOC_XWR18XX_PING14_PADAI, SOC_XWR18XX_PING14_PADAI_SPIB_MISO );
// SPIB MOSI
Pinmux_Set_OverrideCtrl( SOC_XWR18XX_PINF13_PADAH, PINMUX_OUTEN_RETAIN_HW_CTRL, PINMUX_INPEN_RETAIN_HW_CTRL );
Pinmux_Set_FuncSel( SOC_XWR18XX_PINF13_PADAH, SOC_XWR18XX_PINF13_PADAH_SPIB_MOSI );

----------------------------------------------------
Parameter_Setting
----------------------------------------------------

void spi_init(void)
{
	DMA_Params		DmaParams;
	SPI_Params		params;
	int32_t			errCode = 0;
	uint8_t 		inst = 1;

	DMA_Params_init( &DmaParams );
	gDmaHandle = DMA_open( 0, &DmaParams, &errCode );
	if( gDmaHandle == NULL )
	{
		System_printf( "Open DMA driver failed with error=%d\n", errCode );
		return;
	}

	SPI_init();
	
	SPI_Params_init( &params );
	params.frameFormat = SPI_POL0_PHA0;

	params.dmaEnable = 1;
	params.dmaHandle = gDmaHandle;
	params.eccEnable = 1;

	params.mode = SPI_MASTER;
	params.u.masterParams.bitRate = 1000000; (1MHz)
 
	memset((void *)&params.u.masterParams.slaveProf[0], 0, sizeof(params.u.masterParams.slaveProf));

	params.u.masterParams.numSlaves = 3;
	params.u.masterParams.slaveProf[0].chipSelect = 0;
	params.u.masterParams.slaveProf[0].ramBufLen = MIBSPI_RAM_MAX_ELEM/2;
	params.u.masterParams.slaveProf[0].dmaCfg.txDmaChanNum =0U;
	params.u.masterParams.slaveProf[0].dmaCfg.rxDmaChanNum =1U;
	params.u.masterParams.slaveProf[1].chipSelect = 1;
	params.u.masterParams.slaveProf[1].ramBufLen = MIBSPI_RAM_MAX_ELEM/4;
	params.u.masterParams.slaveProf[1].dmaCfg.txDmaChanNum =2U;
	params.u.masterParams.slaveProf[1].dmaCfg.rxDmaChanNum =3U;
	params.u.masterParams.slaveProf[2].chipSelect = 2;
	params.u.masterParams.slaveProf[2].ramBufLen = MIBSPI_RAM_MAX_ELEM/4;
	params.u.masterParams.slaveProf[2].dmaCfg.txDmaChanNum =4U;
	params.u.masterParams.slaveProf[2].dmaCfg.rxDmaChanNum =5U;

	Spihandle = SPI_open( inst, &params );
	
	if( Spihandle == NULL )
	{
		System_printf("Error: Unable to open the SPI Instance\n");
	}
}

----------------------------------------------------
TestCode :
----------------------------------------------------

int main()
{
...
SPI_Transaction transaction;

transaction.count = 2;
transaction.txBuf = outBuffer;
transaction.rxBuf = inBuffer;
transaction.slaveIndex = 0 or 1 or 2;

SPI_transfer( Spihandle, &transaction )
}


TIDL_Import tool Supporting layers

$
0
0

Dear Sir,

I have the knowledge of the layers which are supported by TIDL, but I have some layers on which I am not able to find the references to decide their support, So I want to know that do we have support for them also.

1. Seperable_conv2d - These are depth wise separable convolutions.

2. LeakyRelu - LeakyRelu is an extension of ReLu. In ReLu f(x) = x if x>0, 0 otherwise. In LeakyRelu, f(x) = x if x>0, α*x 

3. HFF (Hierarchical feature fusion)  - HFF is hierarchical addition of multiple tensors.

4. Input_reinforcement - In input_reinforcement, the input image is resized and concatenated with the required feature map along the channels axis.

Kindly do the needful in terms of their support in TIDL, I  also need to know, Does changes in layer nomenclature affects Importing process if the functioning of the layer is the same.

Thanks and Regards,

Vyom Mishra

CCS/AM5728: AM437 GPIO LED Blink Make File Error

$
0
0

Part Number:AM5728

Tool/software: Code Composer Studio

I've similar issue regarding the make file. What should I do to resolve the errors?

I followed all the steps mention in the MYD-C437X-PRU RTOS Development Guide.

TDA2SX: TIDL conversion

$
0
0

Part Number:TDA2SX

Hi everyone, I have one model which I want to convert to be able to use it on TDA2.  Model is trained in Caffe framework. Model is trained for pedestrian detection and output is represented by 100 bounding boxes where every bounding box is described by 7 attributes:
1. BBox index
2. label ID
3. confidence
4. x1/width
5. y1/height
6. x2/width
7. y2.height

I did conversion with tidl_model_import.out application, model is tested with eve_test_dl_algo.out.exe application and as a result stats_tool_out.bin file is generated. What I noticed is that not all information about bounding boxes are populated. Instead of 100 bbox information, I got a lot less. For other bounding boxes, all attributes are populated with zeros instead of BBox index which have value -1.
Can this be sign of not good conversion process?

Output file is in attachment.

(Please visit the site to view this file)


Thanks in advance,
Sasa

AM3352: Adding external EPSON RX8130CE driver to kernel 3.2

$
0
0

Part Number:AM3352

Hi,

I am trying to add EPSON RX8130CE to my eval board with AM3352 and have followed the steps as specified below.

1. Copy the file rtc-rx8130.c into the directory ./linux-3.8.x/drivers/rtc. "linux-3.8.x" refers to
the base of the linux kernel source tree.
2. Add the following lines into the drivers/rtc/Kconfig file:
config RTC_DRV_RX8130
tristate "Epson RX8130CE"
help
If you say yes here you get support for the Epson
RX8130CE RTC chips.
This driver can also be built as a module. If so, the module
will be called rtc-rx8130.
3. Add the following line to the drivers/rtc/Makefile:
obj-$(CONFIG_RTC_DRV_RX8130) += rtc-rx8130.o
4. During the rebuild, make sure to include the 'Epson RX8130CE' option in the Kernel
Configuration window under 'Device Drivers' -> 'Real Time Clock'.

Same is provided in the EPSON website in the RX8130_readme.pdf.

https://www5.epsondevice.com/en/information/support/linux_rtc/down_load.html

Only difference is I am adding the support for kernel 3.2.

So in order to support that, I have modified the rtc-rx8130.c as below 

1.
static int __init rx8130_rtc_init(void)
{
    return i2c_add_driver(&rx8130_driver);
}

static void __exit rx8130_rtc_exit(void)
{
    i2c_del_driver(&rx8130_driver);
}
module_init(rx8130_rtc_init);
module_exit(rx8130_rtc_exit);
from
module_i2c_driver(rx8130_driver);
2. RTC_VL_READ and RTC_VL_CLR is not supported in linux architecture for kernel 3.2 , I have commented that part of the code from the rtc-rx8130.c  file.
So the problem I am facing is that the node /dev/rtc1 is not getting created as specified by Epson and my application code is not able to access the dev node.
Any help or direction to resolve this, will be great.
Thanks and regards,
Dev

 

Linux/AM4379: PROCESSOR SDK FOR CUSTOM BOARD

$
0
0

Part Number:AM4379

Tool/software: Linux

Hi all,

We have custom board with AM4379.

Our references are TMDXIDK437X& AM437X Starter Kit.

I follow Processor SDK Linux Software Developer’s Guide   : http://software-dl.ti.com/processor-sdk-linux/esd/docs/05_02_00_10/linux/index.html

- Linux Host was configured - 18.04 LTS

- SDK was installed - Processor SDK for AM437x

- SD card was created - I tried that SD on Starter Kit. Arago distribution initial screen seen. But when i plug this SD Card to our custom board, anything did not seen on serial port. (Boot mode is configured for SD Card boot operation)

- Run the Setup Script 

✓   Verified Linux Host Distribution, 

✓   Package verification and installation successfully completed 

✓   Target filesystem installed

✓   Minicom serial port reported (ttyUSB0)

 X   IP Address can not autodetected.. I did not write anything for ip address

✓    Linux kernel location is selected : SD Card

✓   Root file system location is selected : SD Card

I don't know what to do now, I need your help.
 
 
Best regards,
Mehmet.

Linux/AM4372: Uboot mtest

$
0
0

Part Number:AM4372

Tool/software: Linux

Hello,

I have tried to add mtest to uboot with following defines:

#define CONFIG_CMD_MEMTEST
#define CONFIG_SYS_ALT_MEMTEST
#define  CFG_MEMTEST_SCRATCH 0x82000000
#define CONFIG_SYS_MEMTEST_START  0x82000000
#define CONFIG_SYS_MEMTEST_END  0x8f000000

If i try to start the memtest with

mtest 0x82000000 0x83000000 0x55ff55ff 1

I get an abort.

What am I doing wrong?

Ti-processor-sdk version: 05.01.00.11

Thanks!

RTOS/TDA2P-ACD: MCAN: No interrupt on receiving/transmitting the messages

$
0
0

Part Number:TDA2P-ACD

Tool/software: TI-RTOS

Hi,

We are trying to test the MCAN sample example in the csl on our custom board. We are using Processor SDk 03.05.00.00

In our custom board, DCAN2 pads have to be configured for MCAN. We have done the related changes in the padConfig_prcmEnable() API of mcan sample application. Following are the changes:

HW_WR_FIELD32(SOC_L4PER_CM_CORE_BASE + CM_L4PER2_DCAN2_CLKCTRL,
                  CM_L4PER2_DCAN2_CLKCTRL_MODULEMODE,
                  CM_L4PER2_DCAN2_CLKCTRL_MODULEMODE_ENABLE);

    while ((HW_RD_FIELD32(SOC_L4PER_CM_CORE_BASE + CM_L4PER2_DCAN2_CLKCTRL,
                          CM_L4PER2_DCAN2_CLKCTRL_IDLEST)) ==
           CM_L4PER2_DCAN2_CLKCTRL_IDLEST_DISABLE)
    {
        ;
    }

The ISR registered in the example is not being called and thus no messages are transmitted / received. We tried probing the CANL and CANH pads and can see the data on the bus. We also probed the CAN Standby pin and it is low.

The example is waiting in the while loop which checks the variable which is set through the ISR. Breakpoint did not hit in ISRs.

What could be the possible issue ?

Regards,

Amol


Is this website (processors.wiki.ti.com) a TI offical website ?

$
0
0

Hi !

I'm searching some data from TI offical website,and I just found a website addressed http://processors.wiki.ti.com

Is this website a TI offical website?Does the content of this website represent the offical view ?

Uboot mtest

$
0
0

Part Number:AM4372

Tool/software: Linux

Hello,

I have tried to add mtest to uboot with following defines:

#define CONFIG_CMD_MEMTEST
#define CONFIG_SYS_ALT_MEMTEST
#define  CFG_MEMTEST_SCRATCH 0x82000000
#define CONFIG_SYS_MEMTEST_START  0x82000000
#define CONFIG_SYS_MEMTEST_END  0x8f000000

If i try to start the memtest with

mtest 0x82000000 0x83000000 0x55ff55ff 1

I get an abort.

What am I doing wrong?

Ti-processor-sdk version: 05.01.00.11

Thanks!

TMS320C6713B: Issue in sending data through the McBSP

$
0
0

Part Number:TMS320C6713B

Hello,

My customer reports an issue when trying to send data with the McBSP. As I do not have knowledge of this processor to dig into this case, could you please look into it? Thank you.

Best regards,
François.


CASE DESCRIPTION:

We using the MacBSP #0 resource of a TMS320C6713 to implement a SPI master driver.

After configuring the resource, and trying to send the first byte of data through this link - writing into the DXR register - our software is then stuck in an infinite while loop, waiting for the XREADY bit to indicate “ready” status in the Serial Port Control Register (SPCR).

The software gets stuck for 25% of the trials.

 When this happens, we observe that:

1.The DX – data transmit pin – is silent, i.e. no data at all is delivered.
2.The CLKX – associated transmit clock – is silent too.

a.We also observe that CLKX signal leaves the hiZ state to a permanent state, which means that the CLKXM bit is properly configured.

3.The McBSP is configured to be driven from internal CPU/2 clock frequency.

a.This internal clock is present.

4.The board is at -6°C

MORE DETAILS, with source code and scope screenshots on Box:

We using the MacBSP #0 resource of a  TMS320C6713 to implement a SPI master driver, as per literature reference SPRU580G, déc. 2006.

After configuring the resource, and trying to exchange the first Read/Write byte of data through this link, the DSP stucks in a “freeze” state.

Here are the high level implementation choices. We choose a bi-directional SPI link,using CLKG as in the internal clock source, without using the internal frame generator.

We choose CLKX frequency = CLKR frequency = 1 MHz.

We choose not to use DMA at all to service DXR and DRR , but only CPU write/read instructions i.e. using the said “polling method.

Next is a detailed log of observations. Please find the raised questions at the end.

When the issue happens, we observe that:

1.No more instructions are executed by the CPU when it freezes almost at the end of the attached source code.

2.The current consumption of the board does not increase as expected when the subsequent source code goes deeper in the SW application that uses >80% of CPU real time budget.

a.This is illustrated by the red trace in the .png oscillogram attached.

3.The CLKX – associated transmit clock – is leaving the High-Z state as expected, as we go through the attached source code, in 100% of cases.

a.This signal is illustrated with the blue trace in the .png oscillogram attached.

b.We understand here that the CLKXM bit is properly configured.

4.Some occurrences of the problem are recorded while 16 CLKX periods are captured as shown in the attached picture. However, the remaining occurrences exhibit NO CLKX periods at all.


5.The McBSP is configured to be driven from internal CPU/2 clock frequency.

a.The CLKS pin receives a ~63 MHz clock from the DSP’s CLKOUT D10 pin, while the CPU clock is running at ~300 MHz.

b.All observed cock signals frequencies match the expectations.

6.The board is at -6°C. At this temperature the DSP freezes with a 25% probability.


7.The problem occurs whatever the source code, i.e.

a.With “SpiDriver_best_try.cpp” which is our best effort to follow Ti’s SPRU580 litterature

b.AND with “SpiDriver_initial_version.cpp”. 

QUESTIONS:

1.In our code “SpiDriver_best_try.cpp, can you see any showstopper that could explain the CPU freezing ?

2.In the “SpiDriver_initial_version.cpp”;

a.can you see any showstopper, given that this version does not stick with your recommendations in §7.1 of SPRU580.

b.In particular, we have noticed that in some code example from Texas Instrument – i.e. SPRA633C - the initialization  begins with a reset to zero – i.e. write only – absolute writing into SPCR. Should we do the same ? We assume that the RESETN pin of the CPU was de-asserted just before the SPI drivers begins; which does the same – we hope.

c.In particular, we perform successive read/write operations into the SPCR configuration register of the McBSP – to set or clear some bits inside - at CPU clock rate without any special wait cycles. Is it a problem ?

d.Should we add some instructions to specifically disable any interaction with the DMA/EDMA controller ?

3.Our “Best Try” still hangs even if we add the Masking of  Global Interrupt Enable – GIE = 0. Should we mandatorily add GIE = 0 during the inits ?

TMS320C6748: mmcsd0

$
0
0

Part Number:TMS320C6748

Hello,

This may be a stupid question but, is the mmcsd controller able to interface with the built in micro sd slot on the board? i see MMCSD1 is located on header J15, but cant find anything for MMCSD0.

Regards,

Brian Dougenik

Linux/AM4379: QSPI Boot Problems

$
0
0

Part Number:AM4379

Tool/software: Linux

Hi,

we developed a own AM437x board, which can be booted from sd-card, network or qspi.
Booting from sd-card or network works fine. When I boot from sd card and flash with ubiformat -f  the qspi flash it looks like everything works fine.

After trying to boot from flash spl and uboot comes up, but during booting the kernel there are major flauts, wichs stopps boot process.

Sine I have a similar board, which I can boot up from the flash with the same image, it has to be something with the hardware I guess.
But I had a look at the signals of the qspi with a oscilloscope and they look ok.

So do you have any idea, what might go wrong? Or is there a way to check, wheter the image flashed successfully? Some ubi command to read back the image and compare it?

Best Regards,

Stefan

Viewing all 17527 articles
Browse latest View live


<script src="https://jsc.adskeeper.com/r/s/rssing.com.1596347.js" async> </script>