I'm wondering if there exists some standard piece of PRU code that acts as an I2C slave?  I'm working on the DA810, which apparently uses the PRU as an I2C slave driver (dMAX) but no source is provided.

Of course the source for the dMAX code on the DA810 would completely solve my problem if anyone has that!

I'm looking for this as I want to improve the handling of an error condition.  The I2C clock can get stuck low if the DSP does not service the PRU in time.

Hi, 

Without going the route of using the newer syslink. How can I compile the example from: http://processors.wiki.ti.com/index.php/QuickStartOMAPL1x_rCSL 

\quickStartOMAPL1x_rCSL\OMAPL1x\rCSL_examples\evmOMAPL138\ARM_examples\syscfg\ARM2DSP_integration_armL138

I want to be able to run this from within Linux on the OMAPL138 board without the help of code composer.

Hola,

Does TI have HDMI 1080p to 720p scaler/converter/switch/bridge...etc.？

Our customer's end equipment is pico projector and its interface & resolution is HDMI 720p so we need something device can achieved this application.

Does TI have a solution can downgrade HDMI resolution from 1080p to 720p？

Besides, we also need corresponding HDCP function with this 720p, if TI have solutions or reference design circuit please having provide to us. Thanks ～

Does anyone have a 3D STEP model for the XTDA3SXXAABFQ1?  This is a 367 ball 15mmX15mm BGA.  Thanks in advance for any help.

I'm trying to set up a Spectrum Digital OMAP-L137 EVM (possibly also referred to as the DA830?) with CCS v6. I've installed the latest SYS/BIOS and associated files. I can compile and load an example generic C674x project (benchmark).

However, when I attempt to start debugging I get an error that the license cannot be acquired and that it only supports XDS100 class or EVMs with onboard emulation. This board has an onboard XDS510 - is there an additional license I need? I have activated the SDK-OMAPL137-U part and Activation ID from the kit on my TI account but this dos not appear to generate any additional CCS license.

I recently began working on a project based on the OMAP-L138.

I am using an OMAP-L138 LCDK (TMDSLCDK138) to become familiar with the processor and the development environment.

I have not developed software for an ARM processor before.

I have worked with C6000 and C5000 DSPs in the past with CCS.

I am trying to learn as much as I can about the Serial Flash Host (sfh) and Serial Flash Target (sft) applications available in the OMAP-L138 LCDK starterware.

I downloaded the executable files and source code for the OMAP-L138 Flash and Boot Utils 2_40. ( http://processors.wiki.ti.com/index.php/Serial_Boot_and_Flash_Loading_Utility_for_OMAP-L138

I followed the instructions to rebuild the tools found here:

( http://processors.wiki.ti.com/index.php/Rebuilding_the_Flash_and_Boot_Utils_Package )

NOTE: The version of Code Sourcery G++ Lite is no longer available. I obtained a trial version of Mentor Graphics Sourcery CodeBench 2014.11-36.

I set ARM_TOOLS_PATH to the arm-none-eabi compiler there.

I was able to build the sfh and sft applications successfully and use them to load a starterware ARM core user bootloader and a DSP uart echo application into NAND Flash on my LCDK.

Next, I pointed ARM_TOOLS_PATH to the arm-none-eabi compiler included in CCSv6.1.0.

Again, I was able to build the sfh and sft applications successfully and use them to load a starterware ARM core user bootloader and a DSP uart echo application into NAND Flash on my LCDK.

I installed Microsoft Visual Studio Community 2015 (free version) so I could create a C# project with the Serial Flash Host (sfh) application code.

I created a CCSv6.1.0 project for the Serial Flash Target (sft) application. I configured the project for debugging with no optimization.

I modified my Visual Studio sfh project to embed the sft.out file from my CCSv6.1.0 project.

When I try to use the new sfh and sft applications, it hangs.

After some study, it looks to me like the code generation tools are putting the stack in the middle of code space. As the program executes, something tramples on code. I observed this using an XDS100v2 emulator attached to my LCDK.

Examining map files, it appears the code generation tools are not putting the stack where it was originally desired.

Since I do not have experience with software development for ARM processors, I do not know the correct way to place a stack section. Is it done correctly in the OMAP-L138 Flash and Boot Utils 2_40? If not, what is the correct way to place a stack section?

In our design we have used OMAPL138EZWTD4 Processor.In production lot out of 130 boards we have observed booting issues on 8 boards at first time power ON .

1. Observation on First time Power ON booting issue : 6 Boards

On 6 boards at initial power ON the board is not booting at all, we have checked OMAPL138 reads boot code from NAND Flash, loads kernel
and the application successfully but there is no print messages on console. On applying second power ON or Manual reset, the same action happens and there is print messages on console.After reset or second power on we have check all the functionality and are working properly without any issues.This issue seems to be inconsistency and unpredictable when we will observe booting failure at first power on those faulty 6 boards.

1. Booting occurs only on Manual reset : 2 Boards

On 2 boards even on second power ON there is no print messages on console.On applying Manual reset only, the same action happens and there is print messages on console.The same issue observed on long back and reported to TI support team FYR service request with reference number #1-994465421. When we changed the processor on one of the reset issue board then it's booting at first time power on, we have checked for consistency found to be OK.

Work around :

• Checked power ON sequence --- OK
• Checked timing between IO power and Reset --- 210ms

• Increased and reduced the timing --- no improvement

• Checked the Boot mode pins latching wrt reset --- OK
• Checked the Nand Flash Chip select,RE# and R/B# found to be OK
• As per silicon errata recommended provided strong pull up and pull down resistors and even tried with hard-coded (without boot switch on faulty boards).

Kindly let me know your inputs / suggestions at the earliest to find the root cause of this issue

Hi,

I can not find info from either TI or Leopard about which cameras fit to LCDK. Could someone pls assist?

risto

I have a DA830 DSK board and I am trying to load one of the OMAPL1x quickstart example programs and I am having trouble booting the ARM core.  I have configured the memory map correctly, however, the ARM will not power on.  When I attempt to enable the ARM PSC the PSC0 PTSTAT and MDSTAT registers remain cleared (0x00).

I also tried the gel file from this post and everything returned back 0s:

ARM9_0: GEL Output:
---------------------------------------------
ARM9_0: GEL Output: | Device Information |
ARM9_0: GEL Output: ---------------------------------------------
ARM9_0: GEL Output: DEV_INFO_00 = 0x00000000
ARM9_0: GEL Output: DEV_INFO_01 = 0x00000000
ARM9_0: GEL Output: DEV_INFO_02 = 0x00000000
ARM9_0: GEL Output: DEV_INFO_03 = 0x00000000
ARM9_0: GEL Output: DEV_INFO_04 = 0x00000000
ARM9_0: GEL Output: DEV_INFO_05 = 0x00000000
ARM9_0: GEL Output: DEV_INFO_06 = 0x00000000
ARM9_0: GEL Output: DEV_INFO_07-DEV_INFO_08-DEV_INFO_09-DEV_INFO_10-DEV_INFO_11-DEV_INFO_12 = 0-0-0-0-0-0
ARM9_0: GEL Output: DEV_INFO_13,DEV_INFO_14,DEV_INFO_15,DEV_INFO_16 = 0,0,0,0
ARM9_0: GEL Output: -----
ARM9_0: GEL Output: DEV_INFO_17 = 0x00000000
ARM9_0: GEL Output: DEV_INFO_18 = 0x00000000
ARM9_0: GEL Output: DEV_INFO_19 =ARM9_0: GEL Output: 0ARM9_0: GEL Output: 0ARM9_0: GEL Output: 0ARM9_0: GEL Output: 0ARM9_0: GEL Output: 0ARM9_0: GEL Output:
ARM9_0: GEL Output: -----
ARM9_0: GEL Output: DEV_INFO_20 = 0x00000000
ARM9_0: GEL Output: DEV_INFO_21 = 0x00000000
ARM9_0: GEL Output: DEV_INFO_22 = 0x00000000
ARM9_0: GEL Output: DEV_INFO_23 = 0x00000000
ARM9_0: GEL Output: -----
ARM9_0: GEL Output: DEV_INFO_24 = 0x00000000
ARM9_0: GEL Output: DEV_INFO_25 = 0x00000000
ARM9_0: GEL Output: DEV_INFO_06 = 0x00000000
ARM9_0: GEL Output: DEV_INFO_26 = 0x00000000
ARM9_0: GEL Output:

ARM9_0: GEL Output: ---------------------------------------------
ARM9_0: GEL Output: | BOOTROM Info |
ARM9_0: GEL Output: ---------------------------------------------
ARM9_0: GEL Output: ROM ID: d800k-48-48-48
ARM9_0: GEL Output: Silicon Revision UNKNOWN
ARM9_0: GEL Output: Boot pins: 0
ARM9_0: GEL Output: Boot Mode: I2C0 EEPROM
ARM9_0: GEL Output:
ROM Status Code: 0x00000000
Description:ARM9_0: GEL Output: No error
ARM9_0: GEL Output:
Program Counter (PC) = 0xFFFF0000
ARM9_0: GEL Output:
ARM9_0: GEL Output: ---------------------------------------------
ARM9_0: GEL Output: | Clock Information |
ARM9_0: GEL Output: ---------------------------------------------
ARM9_0: GEL Output:
ARM9_0: GEL Output: PLLs configured to utilize crystal.
ARM9_0: GEL Output: ASYNC3 = PLL0_SYSCLK2
ARM9_0: GEL Output:
ARM9_0: GEL Output: NOTE: All clock frequencies in following PLL sections are based
ARM9_0: GEL Output: off OSCIN = 24 MHz. If that value does not match your hardware
ARM9_0: GEL Output: you should change the #define in the top of the gel file, save it,
ARM9_0: GEL Output: and then reload.
ARM9_0: GEL Output:
ARM9_0: GEL Output: ---------------------------------------------
ARM9_0: GEL Output: | PLL0 Information |
ARM9_0: GEL Output: ---------------------------------------------
ARM9_0: GEL Output:
ARM9_0: GEL Output: PLL0_SYSCLK1 = 24 MHz
ARM9_0: GEL Output: PLL0_SYSCLK2 = 24 MHz
ARM9_0: GEL Output: PLL0_SYSCLK3 = 24 MHz
ARM9_0: GEL Output: PLL0_SYSCLK4 = 24 MHz
ARM9_0: GEL Output: PLL0_SYSCLK5 = 24 MHz
ARM9_0: GEL Output: PLL0_SYSCLK6 = 24 MHz
ARM9_0: GEL Output: PLL0_SYSCLK7 = 24 MHz
ARM9_0: GEL Output: Error: PLL0_SYSCLK2 must equal PLL0_SYSCLK1 / 2
ARM9_0: GEL Output: Error: PLL0_SYSCLK4 must equal PLL0_SYSCLK1 / 4
ARM9_0: GEL Output:
ARM9_0: GEL Output: ---------------------------------------------
ARM9_0: GEL Output: | PLL1 Information |
ARM9_0: GEL Output: ---------------------------------------------
ARM9_0: GEL Output:
ARM9_0: GEL Output:
ARM9_0: GEL Output: ---------------------------------------------
ARM9_0: GEL Output: | PSC0 Information |
ARM9_0: GEL Output: ---------------------------------------------
ARM9_0: GEL Output:
ARM9_0: GEL Output: State Decoder:
ARM9_0: GEL Output: 0 = SwRstDisable (reset asserted, clock off)
ARM9_0: GEL Output: 1 = SyncReset (reset assered, clock on)
ARM9_0: GEL Output: 2 = Disable (reset de-asserted, clock off)
ARM9_0: GEL Output: 3 = Enable (reset de-asserted, clock on)
ARM9_0: GEL Output: >3 = Transition in progress
ARM9_0: GEL Output:
ARM9_0: GEL Output: Module 0: EDMA3CC (0) STATE = 0
ARM9_0: GEL Output: Module 1: EDMA3 TC0 STATE = 0
ARM9_0: GEL Output: Module 2: EDMA3 TC1 STATE = 0
ARM9_0: GEL Output: Module 3: EMIFA (BR7) STATE = 0
ARM9_0: GEL Output: Module 4: SPI 0 STATE = 0
ARM9_0: GEL Output: Module 5: MMC/SD 0 STATE = 0
ARM9_0: GEL Output: Module 6: AINTC STATE = 0
ARM9_0: GEL Output: Module 7: ARM RAM/ROM STATE = 0
ARM9_0: GEL Output: Module 9: UART 0 STATE = 0
ARM9_0: GEL Output: Module 10: SCR 0 (BR0/1/2/8) STATE = 0
ARM9_0: GEL Output: Module 11: SCR 1 (BR4) STATE = 0
ARM9_0: GEL Output: Module 12: SCR 2 (BR3/5/6) STATE = 0
ARM9_0: GEL Output: Module 13: PRUSS STATE = 0
ARM9_0: GEL Output: Module 14: ARM STATE = 0
ARM9_0: GEL Output: Module 15: DSP STATE = 0
ARM9_0: GEL Output:
ARM9_0: GEL Output: ---------------------------------------------
ARM9_0: GEL Output: | PSC1 Information |
ARM9_0: GEL Output: ---------------------------------------------
ARM9_0: GEL Output:
ARM9_0: GEL Output: State Decoder:
ARM9_0: GEL Output: 0 = SwRstDisable (reset asserted, clock off)
ARM9_0: GEL Output: 1 = SyncReset (reset assered, clock on)
ARM9_0: GEL Output: 2 = Disable (reset de-asserted, clock off)
ARM9_0: GEL Output: 3 = Enable (reset de-asserted, clock on)
ARM9_0: GEL Output: >3 = Transition in progress
ARM9_0: GEL Output:
ARM9_0: GEL Output: Module 0: EDMA3CC (1) STATE = 0
ARM9_0: GEL Output: Module 1: USB0 (2.0) STATE = 0
ARM9_0: GEL Output: Module 2: USB1 (1.1) STATE = 0
ARM9_0: GEL Output: Module 3: GPIO STATE = 0
ARM9_0: GEL Output: Module 4: UHPI STATE = 0
ARM9_0: GEL Output: Module 5: EMAC STATE = 0
ARM9_0: GEL Output: Module 6: DDR2 and SCR F3 STATE = 0
ARM9_0: GEL Output: Module 7: MCASP0 + FIFO STATE = 0
ARM9_0: GEL Output: Module 8: SATA STATE = 0
ARM9_0: GEL Output: Module 9: VPIF STATE = 0
ARM9_0: GEL Output: Module 10: SPI 1 STATE = 0
ARM9_0: GEL Output: Module 11: I2C 1 STATE = 0
ARM9_0: GEL Output: Module 12: UART 1 STATE = 0
ARM9_0: GEL Output: Module 13: UART 2 STATE = 0
ARM9_0: GEL Output: Module 14: MCBSP0 + FIFO STATE = 0
ARM9_0: GEL Output: Module 15: MCBSP1 + FIFO STATE = 0
ARM9_0: GEL Output: Module 16: LCDC STATE = 0
ARM9_0: GEL Output: Module 17: eHRPWM (all) STATE = 0
ARM9_0: GEL Output: Module 18: MMC/SD 1 STATE = 0
ARM9_0: GEL Output: Module 19: UPP STATE = 0
ARM9_0: GEL Output: Module 20: eCAP (all) STATE = 0
ARM9_0: GEL Output: Module 21: EDMA3 TC2 STATE = 0
ARM9_0: GEL Output: Module 24: SCR-F0 Br-F0 STATE = 0
ARM9_0: GEL Output: Module 25: SCR-F1 Br-F1 STATE = 0
ARM9_0: GEL Output: Module 26: SCR-F2 Br-F2 STATE = 0
ARM9_0: GEL Output: Module 27: SCR-F6 Br-F3 STATE = 0
ARM9_0: GEL Output: Module 28: SCR-F7 Br-F4 STATE = 0
ARM9_0: GEL Output: Module 29: SCR-F8 Br-F5 STATE = 0
ARM9_0: GEL Output: Module 30: Br-F7 (DDR Contr) STATE = 0
ARM9_0: GEL Output: Module 31: L3 RAM, SCR-F4, Br-F6 STATE = 0

Reference:  https://e2e.ti.com/support/dsp/omap_applications_processors/f/42/t/131433

Present setup: LCDK138 board moving to custom target with OMAP-L138-EP.

The above reference shows a function that duplicates the actions of a CCS GEL file for PLL0.

I have not seen a STARTERWARE function that does similar. (We are not planning to use an RTOS on our particular application.)

Are there additional functions that need to be created for OMAP-L138 standalone applications?

For instance, what about PSC init, and PLL1 init? I see feedback on these from CCS.

Also, should the device_PLL0() function be run from ARM on bring-up? (I would assume yes.)

Hi,

I have a custom board that use an OMAP-L138 that uses a NAND to store all the data.

I am facing a problem of a card that don't boot,  appearing to have some type of corruption on NAND, the board previously booted ok.

I am trying to find a way to dump the contents of the nand to compare with the data saved.

How I can use slh to load a u-boot image to memory (I am using DDR2 on board) and start it?

I have tried to follow this answer  [1] but don't quite understand the changes that I need to make. As it is don't  work.

I have crossed with a doc [2] that have an Advisory 2.3.24 that can be the problem that I am facing. How can I confirm that? Is there any tool to help on this matter.

Thanks for the time

[1] - https://e2e.ti.com/support/dsp/omap_applications_processors/f/42/p/151906/552578#552578

[2] - www.ti.com/lit/pdf/sprz305

Regards,
Aníbal

Trying to create a fiber-optic transmission system between two LCDK's. We have built the simple transmitter and receiver circuits, and we are able to send and receive data. We are using GPIO8-12 as our output and GPIO8-10 as our input.

But our data rate is really slow. We are limited to a clock period of 1 ms, and are looking for a way to speed that up. Are there other clocks we can use to get a faster sampling rate? The AIC3106 sample rate of 48 KHz is a big improvement, but we are looking for even faster polling of the GPIO pins. Can we do that?

Mike Briggs

Hello,

I am using custom board similar to the LCDKC6748 and i am trying Ethernet communications.

I am able to have alive and link to the PHY LAN8710A by checking the mdio and emac register bunch.

I am able to transmit the data by writing the transmission descriptor and able to see the interrupt on channel TXINTSTATRAW.

Now, i placed phy in the loop-back mode to verify the receive channel.

I am seeing nothing in RXINTSTATRAW and even on RXGOODFRAMES registers.

Any clues?

I'm trying to use the GPIO to receive a fiberoptic input. Is it possible to rapidly check the GPIO input using a clock and or interrupt?

I've been doing some reading, and it looks like I'd use SYSCLK4, but I'm confused at the limitations and implementation of creating an interrupt to check the input at the GPIO pin.

Is it possible to sample the GPIO input at 1 MHz? If so, would I use a GPIO interrupt, or would I initialize a clock signal using SYSCLK4 and the timer.h/timer.c files?

Hi All,

I have been trying to following this tutorial Creating a Root File System for Linux on OMAP35x located here. Everything was going to plan until I got to the section titled "Configure the New Target Root File System"

My target directory is empty after executing the install command 

make CONFIG_PREFIX=/home/$USER/target install

I don't get the following directory in target. In fact there is nothing in there

drwxr-xr-x 2 root root 4096 Nov 21 10:20 bin
lrwxrwxrwx 1 root root 11 Nov 21 10:20 linuxrc -> bin/busybox
drwxr-xr-x 2 root root 4096 Nov 21 10:20 sbin
drwxr-xr-x 4 root root 4096 Nov 21 10:20 usr

Please advise what can be done here. 

I am using OMAP-L138 with spectrum XDS560PLUS to do Emulation with PRU, however, my code cannot run in emulation mode correctly and when I try to stop the PRU, I got the error below, Which I haven't met when the PRU code is simpler than this one (around 107words after pasm compile, before is 70 words). both the codes run correctly when compile together with DSP file into .bin file and flash to the board and run directly. So is there certain limitation in emulating PRU core in OMAP-L138 with XDS560 or the debug setting is wrong? I tried xds100V2. results are the same.

Error below:

PRU_0: Trouble Halting Target CPU: (Error -2062 @ 0x0) Unable to halt device. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 6.0.83.1) 

Hi

I am trying to install CCS v6.1.2 (ccs_setup_6.1.2.00015.bin) on Linux Kubuntu 13.10.

I am following the instructions in README_FIRST.txt file and the platform specific instructions on TI wiki.

sudo apt-get update gives me tens of the following type of errors:

W: Failed to fetch http://security.ubuntu.com/ubuntu/dists/saucy-security/multiverse/binary-i386/Packages  404  Not Found [IP: 91.189.91.14 80]

And I am assuming that the previous error is the reason why the consecutive step with "sudo apt-get install libgnomeui-0 libusb-1.0-0-dev" also fails.

Do you have working instructions on how to install the CCS6 on Ubuntu 13.10? The ones in TI wiki do not work. Do you have those missing packages available in some repository?

Marko

Hi,
My application is basically a video streaming project. I choose OmniVision OV6946+OV420 as the CMOS camera + video A/D converter. Since the output from the A/D converter is only a 12bit RAW RGB data, I need to convert it into either RGB565 or YCbCr(4:2:2). In fact I found that the OMAP L138 's VPIF has the capability to capture raw image, but there is no information related to the colour interpolation/democaication capability of the VPIF, please correct me if I'm wrong. So my question is...is it possible to convert the captured RAW RGB to either RGB656/YCbCr(422) using the VPIF with less processor ahead?

Hi, 

I am new to this embadded programming, please anybody post the receiver code for OMAP-L137.

As per reference manual 

RSR receives serial data from the UARTn_RXD pin. Then RSR concatenates the data and moves it into
RBR (or the receiver FIFO). In the non-FIFO mode, when a character is placed in RBR and the receiver
data-ready interrupt is enabled (DR = 1 in IER), an interrupt is generated. This interrupt is cleared when
the character is read from RBR. In the FIFO mode, the interrupt is generated when the FIFO is filled to the
trigger level selected in the FIFO control register (FCR), and it is cleared when the FIFO contents drop
below the trigger level.

i am not getting that how to check character is received in RRB  and how to redad that received character.

PLEASE REPLY ME ANYBODY 

Thanks