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Latency for memory access

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Hi,

Please help to see if information from IC's designer can be obtained for this question.

We used assembly routine to test core execution speed, and although the cpu runs at 300mhz, for each us’s 300 cycles we could only access ARM local RAM for 6 times, with both I/D cache enabled and unaltered from default state.

As in ARM’s 926EJ-S (ARM DDI 0198E) there is TCM used as a fast memory interface. Information related to TCM is not seen in L138 documents, except that in TRM’S interconnect diagram we see ARM RAM is connected to cache and cpu via SCR2.

1. Please provide more information on how TI implements TCM. What is the cycle delay for accessing 8K RAM, and shared 128K RAM and DDR2, respectively?

2. Please also test with the attached assembly, which we place in 8K RAM, with stack allocated at 128K shared RAM. We verified at clocking module multiplier/dividers and the clock for CPU is indeed 300mhz. Is the speed of execution (6 RAM assesses per us) normal? And how could it be so slow even with cache enabled?

 

Lencho

(Please visit the site to view this file)


OMAPL137 Toggling the GPIO from the ARM Side in SYSBIOS

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Hi,

I started this thread a while back. I posted in the wrong thread, moved to this forum where I think the question fits better but I still have not been able to solve this issue. I had a few other things to wrap but I would like to revisit this one since is very simple and I can figure out what is happening.

here is the original thread:  (please excuse if this is not the right path but the other thread seems to be out of your radar).

I'm trying to toggle some of the user LEDs on the EVM omapl137 from Spectrum Digital from the ARM with SYSBIOS. I'm able to do the following: toggle the LED from the DSP just using the rCSL, toggle the LED from DSP with SYSBIOS, and toggle the LED from the ARM just using rCSL (a simple C project not rtsc).

I'm trying two approaches. Using the DSP GPIO functions from the Spectrum Digital test code that works on the DSP and the register configuration using the rCSL example for the ARM but in SYS/BIOS.

I'll start with the second which I think is the correct path.

I can build the project. I first create a typical sys/bios for the arm, change the config file so I can see the SysMin output when exit. That part compiles and works. I can see print on the console. The I added to my include path the rCSL support folder: "C:\ti\quickStartOMAPL1x_rCSL\OMAPL1x\support\includes". Then I declared the sysconfig and the gpio register, the same way they are declared on the rCSL example. 

Copy the first section of the code that configure the PINMUX and sets de direction.

As soon as the code steps into:

the code jumps to No source available for "0xffff0010" 

C6748DSP

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 I am using C6748dsp processor  i need for this any example code or application note please help me ...

[AM1806]No NAK generated even when there is IN transaction in AM1806 USB

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Dear Champs,

My customer found an issue that there was no NAK for IN transaction from USB HUB at sometime although there were NAK occurred in most time.

This issue also depend on the cable and there is some USB cable causing this issue. e.g. this issue was occurred in same USB cable.

So, they want to get our advice how they can debug this issue, and they also want to know if there is USB packet analyzer or something else to check this beside measuring USB eyediagram.

Could you please provide advice how they can debug this issue? and which equipment can be used for this like USB issues?

Thanks and Best Regards,

SI.

Connecting Digital Microphones to OMAP L138 Dev Kit

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Can I connect multiple I2S digital microphones (up to 8) to the OMAP L138 development kit? 

Would this require additional HW?

Should I be looking at a different DSP development kit?

Thanks,

Mike

SNTP client for linux on AM1808

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Hello,

I am using AM1808 processors and have linux ported on it.

Can anyone suggest me where i can find SNTP client executable/source code.

There is a utility in linux called SNTP command/daemon. If i can get this utility for AM1808(linux), that will also help.

Thank you

sanket

Loading DSP L2RAM from external NAND Flash on LCDK138 using CCS6 JTAG

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All:

I have been successful in loading ARM code from NAND flash (into 0x80000000 range) and once completing work with ARM, I can then load the DSP code from NAND flash (block 6) into DDR memory. However, I would like to know what it takes to load the DSP code from NAND flash into the DSP L2RAM range. 

Does it take a different AIS configuration? (It would appear the answer is definitely yes.)

Are there specific settings to be able to enable L2RAM? (Like power settings, etc.)

If someone has done this already using the UART boot mechanism, then I should be able to transition to the CCS mechanism.

Thanks.

Running Opus Encoder Test App on C6748 DSP on OMAP L138 result in opcode exception

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I am trying to run OPUS encoder on C6748, however the process function of the encoder returns exception (opcode).

I thought the the opus codec library should be compatible with C6748 as well as mentioned in one of the forums.

The library specifically mentions C66xx compatible. COuld anyone from TI look into the below issue.

Can anyone point me to OPUS code so that i can compile it for C6748 without linking the library.

[C674X_0] Test Vector No. 1
Encoder Input : ..\TestVecs\Input\sample.wav
Encoder Reference Output : ..\TestVecs\Bitstream\sample_audio_48k_mono_128kbps_FB_c3.bit
Encoding 48000 Hz input at f kb/s in fullband mode with 480-sample frames.
Processing the frame: 1
A0=0x1 A1=0x0
A2=0x0 A3=0xc3056f38
A4=0x0 A5=0x0
A6=0x0 A7=0x0
A8=0x168 A9=0x168
A10=0xc3082040 A11=0xc305fcb8
A12=0xc3056f10 A13=0x15
A14=0x78 A15=0x1
A16=0x168 A17=0x6fc
A18=0xffffff88 A19=0xffe0b76e
A20=0x1e0 A21=0xc303e520
A22=0xc3057090 A23=0x1
A24=0x2 A25=0xc3004180
A26=0x450 A27=0x0
A28=0x51eb851f A29=0x30
A30=0x0 A31=0x2f
B0=0x1 B1=0x0
B2=0x80000000 B3=0xc3000440
B4=0x0 B5=0x0
B6=0x168 B7=0x0
B8=0x0 B9=0x1
B10=0x271a B11=0x1
B12=0xc30830f8 B13=0x4fb
B14=0xc30857d8 B15=0xc307cec8
B16=0x0 B17=0x1
B18=0x800 B19=0x1c9411
B20=0xffffff96 B21=0xffffff96
B22=0xffffff96 B23=0xffcb6204
B24=0xffcb2204 B25=0xffcb2a04
B26=0x1e0 B27=0xc305fbe0
B28=0xa0 B29=0x0
B30=0x0 B31=0x4fb
NTSR=0x1400c
ITSR=0x0
IRP=0x0
SSR=0x10
AMR=0x0
RILC=0x1
ILC=0x52
Exception at 0xc30004aa
EFR=0x2 NRP=0xc30004aa
Internal exception: IERR=0x8
Opcode exception
ti.sysbios.family.c64p.Exception: line 256: E_exceptionMax: pc = 0xc30004aa, sp = 0xc307cec8.
xdc.runtime.Error.raise: terminating execution


McBSP

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Can I use BFIFO of McBSP without EDMA ?

Can you have an example or documentation ?

By Sergio D'Orazio,

McBSP

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Can I use BFIFO of McBSP without EDMA ?

Can you have an example or documentation ?

By Sergio D'Orazio.

Using ARM UBL to run DSP program on OMAP L138 (TDMSEVML138-B)

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This seems like it should be easy, but I am having a lot of trouble booting a DSP program on the OMAP L-138 from NOR flash. I have a LogicPD TMDSEVML138 and have been following the steps here: http://processors.wiki.ti.com/index.php/Boot_Images_for_OMAP-L138#Booting_DSP_Binaries

This works just fine. I follow the steps under "Running" and the program boots out of NOR and the lights flash. I decided to try another program and see if I really understood what was going on; clearly I do not. I downloaded 1020489B-1_CCSv4-2-4_with_SOM-M1_BSL_WS.zip from LogicPD and tried to connect their LCD test to the ARM UBL from the TI wiki. I changed the linker_dsp.cmd file to:

/*****************************************************************************
* linker command file for OMAP-L138 test code.
*
* © Copyright 2009, Logic Product Development Company. All Rights Reserved.
******************************************************************************/
-l rts6740.lib

-stack 0x00000800
-heap 0x00000800

MEMORY
{
dsp_l2_ram: ORIGIN = 0x11800000 LENGTH = 0x00040000
shared_ram: ORIGIN = 0x80001000 LENGTH = 0x00020000
external_ram: ORIGIN = 0xC0000000 LENGTH = 0x08000000
arm_local_ram: ORIGIN = 0xFFFF0000 LENGTH = 0x00002000
}

SECTIONS
{
.cinit > shared_ram
.text > shared_ram
.const > shared_ram
.bss > shared_ram
.far > shared_ram
.switch > shared_ram
.stack > shared_ram
.data > shared_ram
.sysmem > shared_ram
.cio > shared_ram
}

After building the .bin with AISGen it does not actually run. I am totally confused as to why one program works while the other does not. What am I missing?

What is the location of OMAP L138 os repository?

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root@omapl138-lcdk:~# lsb_release -a
Distributor ID: Angstrom
Description: Angstrom GNU/Linux 2011.09 (Dureza)
Release: 2011.09
Codename: Dureza

I am unable to update or upgrade the os.

What is the location of the os repository?

C6748 Development Kit (LCDK), NAND question, Bad Block marks

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Good afternoon!

As short description:

- the dev board is LCDK

- C6748_StarterWare_1_20_04_01

-compiling example - /C6748_StarterWare_1_20_04_01/examples/lcdkC6748/nand

Lets look at example output

************* StarterWare NAND Application ************
 ****************** NAND DEVICE INFO ******************
    MANUFACTURER ID    : 0x2C
    DEVICE ID          : 0xCC
    PAGESIZE           : 2048 Bytes
    BLK SIZE           : 131072 Bytes
    PAGES PER BLOCK    : 64
 ******************************************************

Please Enter The Block Number(0 - 4095) 10
Please Enter The Page Start Page Number(0 - 63) 0
 Please Enter The Number Of Pages To Write 1
 Erasing The Block 10                         : Succeeded.
 Writing To Page 0 Of Block 10                : Succeeded.
 Reading From Page 0 Of Block 10              : Succeeded./S-S/ /T-T/ /A-A/ /R-R/ /T-T/ /E-E/ /R-R/ /W-W/ /A-A/ /R-R/ /E-E/
 NAND Data Integrity Test                    : Passed
 ******************************************************
 Block Is Bad, Can't Continue ...!!!

A little modification at the end of this file by adding one more check for bad blocks

retVal = NANDBadBlockCheck ( &nandInfo, blkNum );

UARTprintf("NANDBadBlockCheck(). rc=%01d",retVal);
          if ( retVal == NAND_BLOCK_BAD )
            {
              UARTPuts ( "\r\n Block Is Bad, Can't Continue ...!!! ",-1 );
              while ( 1 );
            }

If the application writes any data from page 2 to 62, everything is good.

The question is, when any data writes to any blocks at page 0 or 1 entire block becomes bad, so why it happens and how to fix it?

Thanks in advance!

WBR,

Dmitriy.

Configuration of EMAC and MDIO modules for c6748

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Hello,

emac.h, mdio.h and lan8710a.h have bunch of APIs in them however their input arguements in the function prototypes are hard to understand. Such as base address to input/output frequencies for mdio. Infact where can i get detailed description for the APIs provided on the page ".

thanks!

McBSP

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Can I use BFIFO of McBSP withput EDMA ?

Can you have an example or documentation ?

By Sergio D'Orazio,



Flashing SPI Flash from OMAP L138 E (secure) with UART Tool

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Hello, we are using a custom board and the OMAP L138 E.

I build a little programm for flashing some LEDs and use the secure AISgen tool to get the right formatted .bin File for flashing to the SPI Flash. Which Tool is provided from TI to flash the file over the UART to the secure OMAP-L138 E?

I have tried to boot my file with GenericSecureUartHost.exe and this is working fine, but flashing with the sfh_OMAP-L138.exe is not possible I think, or is it?

Best regards

Thomas

Trying to use the sample code in starterware to write to a USB drive

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I've been playing around with the USB code that ships with the starterware for the LCDKC6748. I've got it running and can properly read a file from the USB key. There is no write command so I tooke the read (cat) command code and modified it to write to a file. The fat-fs function f_open works and returns the proper status when I open a file for writing and the f_write finction seems to return OK. When I call f_sync or f_close I get an error and no data is written to the USB key. Does the low level code that ships with the example work properly? Has anyone got it writing to a USB key? Sorry if this is the wrong form, if so just let me know the proper one and I'll post my question there.

Thanks,

Blair

the time delay question in ATA_SubmitIdentify() function when initing ATA deriver

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Hi, everyone:

I use the RTFS system to read and write SATA on the OMAP-L138 board. And I use bios_5_41_13_42, rtfs_1_10_02_32, pspdrivers_01_30_01.

 My code stuck in ATA_DrvInit() function while it is working fine with RTFS example. After debugging I found that it is stuck in ATA_SubmitIdentify() function.

In the ATA_SubmitIdentify() function, there are a section of codes:

       pReq -> Retry   = 10u;

       ATA_SubmitReq (pDevice, pReq);

       while (pReq -> Retry != 0)

       {

          //PAL_osWaitMsecs (1u);

              m_delay(1u);

              //pReq -> Retry--;

       }

And the m_delay function:

void m_delay( Uint32 msecDelay)

{

    volatile Uint32 i,j;

//  TSK_sleep(msecDelay);

    for(i=0; i<msecDelay; ++i)

           for(j=0; j<0x1fff; ++j); //TODO ???

}

If I run straightly, the program will enter infinite loop in the m_delay function. But if I abandoned the “//” before “pReq -> Retry--;”, and set a breakpoint before “while (pReq -> Retry != 0)”, the ATA_SubmitIdentify() function could go successfully and then ATA_driver could be Initialized successfully.

So how does the variable pReq -> Retry be changed? Could you please tell me why it is like this here and how I should configure here? 

Please help me. Thanks a lot!

Best wishes

Samantha

C6Accel extension - builds fine, but returns -7 please help.

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[DSP] @1,906,660tk: [+0 T:0xc3c489cc] OM - Memory_cacheInv> Enter(addr=0xc2000000, sizeInBytes=40)
[DSP] @1,906,702tk: [+0 T:0xc3c489cc] OM - Memory_cacheInv> return
[DSP] @1,906,732tk: [+0 T:0xc3c489cc] OM - Memory_cacheInv> Enter(addr=0xc2001000, sizeInBytes=4)
[DSP] @1,906,772tk: [+0 T:0xc3c489cc] OM - Memory_cacheInv> return
[DSP] @1,906,801tk: [+0 T:0xc3c489cc] ti.sdo.ce.universal.UNIVERSAL - UNIVERSAL_process> Enter (handle=0xc3c485a0, inBufs=0xc3c4ab74, ou
tBufs=0xc3c4ac38, inOutBufs=0x0, inArgs=0xc3f07efc, outArgs=0xc3f07f18)
[DSP] @1,906,885tk: [+5 T:0xc3c489cc] CV - VISA_enter(visa=0xc3c485a0): algHandle = 0xc3c485d8
[DSP] @1,906,927tk: [+0 T:0xc3c489cc] ti.sdo.ce.alg.Algorithm - Algorithm_activate> Enter(alg=0xc3c485d8)
[DSP] @1,906,969tk: [+0 T:0xc3c489cc] ti.sdo.ce.alg.Algorithm - Algorithm_activate> Exit
[DSP] @1,907,011tk: [+5 T:0xc3c489cc] CV - VISA_exit(visa=0xc3c485a0): algHandle = 0xc3c485d8
[DSP] @1,907,051tk: [+0 T:0xc3c489cc] ti.sdo.ce.alg.Algorithm - Algorithm_deactivate> Enter(alg=0xc3c485d8)
[DSP] @1,907,093tk: [+0 T:0xc3c489cc] ti.sdo.ce.alg.Algorithm - Algorithm_deactivate> Exit
[DSP] @1,907,128tk: [+0 T:0xc3c489cc] ti.sdo.ce.universal.UNIVERSAL - UNIVERSAL_process> Exit (handle=0xc3c485a0, retVal=0xfffffff9)
[DSP] @1,907,180tk: [+5 T:0xc3c489cc] CN - NODE> returned from call(algHandle=0xc3c485a0, msg=0xc3f07c80); messageId=0x0002bffa
@3,575,225us: [+0 T:0x4000b300] CE - Engine_fwriteTrace> returning count [1519]
@3,575,411us: [+0 T:0x4000b300] CV - VISA_call Completed: messageId=0x0002bffa, command=0x0, return(status=-7)
@3,575,589us: [+5 T:0x4000b300] CV - VISA_freeMsg(0x59828, 0x41390c80): Freeing message with messageId=0x0002bffa
@3,575,756us: [+0 T:0x4000b300] ti.sdo.ce.universal.UNIVERSAL - UNIVERSAL_process> Exit (handle=0x59828, retVal=0xfffffff9)
Status=-7 - result=0.000000

NANDWriter_ARM Project

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All:

LCDK138 board

XDS100v2 JTAG

CCS 6.1.1

OMAP-L138_FlasnAndBootUtils_2_40

Compiler version: TI v15.12.0.LTS

Output format: eabi (ELF)

I am trying to get the NANDWriter_ARM project running on the low-cost development board, but I am running into a problem:

#10008-D cannot find file "rtsv5_T_le_eabi.lib" 

 

Is there another library file that should be referenced?

Is the library file that is being sought in the OMAP-L138_FlasnAndBootUtils_2_40 directory?

 

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