I am using Code Composer Studio/C Language to program OMAP-L138, trying to generate an GPIO Interrupt at a frequency ~1MHz. I have looked over the sample C libraries functions, as well as the L138 Manual, but I found them confusing and still don't know how to do so. Are there any sample codes I can look at? More particularly, I don't know exactly how to set the frequency of interrupt and how to write to/read from a register in L138.
Thanks
All:
I am sure that there are several enhancements that have been considered - but here is one:
If you had extended the pins on the J14, J15 headers it would allow me to easily connect a logic analyzer to the EMIFA bus or other specific communications buses to follow on the LA what is going on with the hardware. Is that something that could be done for a future pass of the board?
Also, it would be nice to have a built-in emulator on the board, like the TI Launchpads have. (I realize there is a LOT of hardware on the board, but it does add to the "low cost" to have to procure an emulator.)
I have encountered a discrepancy between the field descriptions of the Timer Control Register (TCR) in spruh77a OMAP-L138 DSP+ARM Processor Technical Reference Manual and the hw_tmr.h header file used in the OMAP-L138 starterware "timer" example program.
In spruh77a, I find descriptions for the following fields:
READRSTMODE34
ENAMODE34
CAPEVTMODE12
CAPMODE12
READRSTMODE12
TIEN12
CLKSRC12
ENAMODE12
PWID12
CP12
INVINP12
INVOUTP12
TSTAT12
However, hw_tmr.h defines additional fields, shown in red:
CAPEVTMODE34
CAPMODE34
READRSTMODE34
TIEN34
CLKSRC34
ENAMODE34
PWID34
CP34
INVINP34
INVOUTP34
TSTAT34
CAPEVTMODE12
CAPMODE12
READRSTMODE12
TIEN12
CLKSRC12
ENAMODE12
PWID12
CP12
INVINP12
INVOUTP12
TSTAT12
/** ============================================================================
* \file hw_tmr.h
* \brief This file contains the Register Descriptions for Timer
* ============================================================================
*/
...
/**************************************************************************\
* Field Definition Macros
\**************************************************************************/
...
/* TCR */
#define TMR_TCR_CAPEVTMODE34 (0x30000000u)
...
#define TMR_TCR_CAPMODE34 (0x08000000u)
...
#define TMR_TCR_READRSTMODE34 (0x04000000u)
...
#define TMR_TCR_TIEN34 (0x02000000u)
...
#define TMR_TCR_CLKSRC34 (0x01000000u)
...
#define TMR_TCR_ENAMODE34 (0x00C00000u)
...
#define TMR_TCR_PWID34 (0x00300000u)
...
#define TMR_TCR_CP34 (0x00080000u)
...
#define TMR_TCR_INVINP34 (0x00040000u)
...
#define TMR_TCR_INVOUTP34 (0x00020000u)
...
#define TMR_TCR_TSTAT34 (0x00010000u)
...
#define TMR_TCR_CAPEVTMODE12 (0x00003000u)
...
#define TMR_TCR_CAPMODE12 (0x00000800u)
...
#define TMR_TCR_READRSTMODE12 (0x00000400u)
...
#define TMR_TCR_TIEN12 (0x00000200u)
...
#define TMR_TCR_CLKSRC12 (0x00000100u)
...
#define TMR_TCR_ENAMODE12 (0x000000C0u)
...
#define TMR_TCR_PWID12 (0x00000030u)
...
#define TMR_TCR_CP12 (0x00000008u)
...
#define TMR_TCR_INVINP12 (0x00000004u)
...
#define TMR_TCR_INVOUTP12 (0x00000002u)
...
#define TMR_TCR_TSTAT12 (0x00000001u)
...
I am going to assume that these additional fields are valid.
I am also going to assume these additional fields were simply omitted from spruh77a.
Are my assumptions appropriate?
Will this EVM be supported by the latest StarterWare
?
I try to get an interrupr from GPIO bank 2 on the ARM side (it works with SYSBIOS 6). It looks strange 'cause I thought it'll be easy to configure interrupts with SYSBIOS similarly to DSP side. My ISR function doesn't execute although I can see a pending flag in the periphery register.
I use the interrupt number 4, pin 4 from the gpio bank 2. The event number is 44 for the gpio bank 2.
These are several screenshots which will help to understand a problem:
This is a flag of the interrupt
This is a state of the interrupt enabling:
Some registers:
Vector locations and memory map:
SYSBIOS config:
Could anybody explain what is wrong?
Hello,
I am loading a code done by a colleague of mine. The code builds and loads ok using her environment. When I try to build and load to the target OMAP L 137 board the load fails with the following message. We are only using the DSP (C6747) but the ARM.
Here is the error message I get "Trouble Setting Breakpoint with the Action "Process CIO" at 0xc1735778: Error 0x80002088/-1250 Fatal Error during: Break Point, Target Communication, Control, Device driver: Lost USB connection to emulator. You should ABORT and restart to re-establish the USB link. ". It is shown in the screen capture below.
There is a similar post previously which points to a memory map issue. However I think I am using the correct GET file and .tcf files. Any help in debugging the issue is greatly appreciated!
Here is from the properties dialog:
And here are the two GEL files used
Hi,
I wish to use SPI on the OMAP-L138 to communicate with an external board (a CAN controller).
Looking at the schematic for the board, J15 has the following connections:
SPI1_SCSn_7, SPI1_SCSn_6, SPI1_SCSn_1, SPI1_SCSn_0
and
SPIO_SIMO, SPIO_SOMI, SPIO_CLK, SPIO_ENAx
Firstly, there are no SPIO pins on the processor, only SPI0 and SPI1 - is this a typo, should this read SPI0?
Secondly, am I correct in thinking that SCSn pins are the chip select pins? If so, is the label correct when it says they are for SPI1? It does not make sense to bring the chip select pins for SPI1 out to this header, if the 'main' SPI pins are for SPI0.
I'm hoping there is a typo somewhere, because it would be very unfair to not bring out the chip select pins for the same SPI peripheral on the header!
Many thanks,
Chris
Hello,
I am using the custom board for the c6748 dsp and i have achieved upto link with phy and auto negotiation. I am now running the enet_LWip example and adapted the program to run with my custom board with RMII communication. I am receiving data as rxgoodframes is increasing and i am able to see the message is being printed from the rx interrupt subroutine.
Now i want to implement communication between pc and board by udp along with ping (ICMP).
Could anyone guide me how should i do it?
See SPRU186V, section 7.4.25, Scan All Libraries for Duplicate Symbol Definitions (--scan_libraries).
The linker already knows how to do what you are trying to do manually ...
Hi
I used GT_Trace to collect the time difference between trigger time and completion time.
Eg:
1st Attempt
[DSP] @5,320,291tk [+3 T:0x00000000] codec.edma - GPIO Trigger
[DSP] @5,627,793tk [+3 T:0x00000000] codec.edma - Complete Processing
2nd Attempt
[DSP] @6,492,935tk [+3 T:0x00000000] codec.edma - GPIO Trigger
[DSP] @6,884,080tk [+3 T:0x00000000] codec.edma - Complete Processing
With reference to this site, http://processors.wiki.ti.com/index.php/Codec_Engine_Profiling , the trace output is different from mine.
It has microseconds instead of tk.
My DSP clock is at 300000 returned by GBL_getFrequency().
I would like to know how to calculate the time difference.
Thanks.
Dear Sir/ Madam,
We are working on a project wherein we need to use Radar and Camera inputs.
While surfing TI website we came across below products and found them relevant to the application we are working on;
TDA2x, TDA3x, AFE5401 EVM, TSW1400EVM.
We have few queries as below
1. One of the schemes for Radar based application as below:
AFE5401-Q1EVM: Radar Sensor evaluation board
TSW1400EVM : MCU for processing and writing algorithm with above board
Please suggest on this.
2. Let us know if we can use above sensor board with TDA2x and TDA3x boards
3. Let us know whether TDA2x has both camera and Radar sensor input capability
4. Please suggest on above lines the camera boards to be used in automotive environment
5. Availability of Matlab/ Simulink library for above boards for algorithm development.
We have C6000 series TSP, can this be used with above boards?
Thank you,
Rohit
Tata Motors. Pune
Hi,
I have a question about licences of libraries and tools included in CCS (6.1) bundle.
I have not found Licence manifests/Licence Types for the following tools:
* EDMA3-LLD (is its licence the same as for SYS/BIOS, i.e. BSD-3?)
* NDK (ver. 2.24)
* PSP drivers (ver. 2.1, OMAP-L1xx)
* UIA (ver. 2.0)
Could you help me and provide legal SW manifests or license agreements for these libraries.
Thank you
Radek
Hi,
I have an OMAPLCDK board that I have been working on for a month now. Recently I found that When I was working with the mmcSD_Fatfs examples in BiosPSP the board makes a very unusual screeching noise. I was not sure of the source of the sound until I noticed that the OMAP processor chip was getting unusually hot. I wish I could record and attach the sound in a video somehow, but my office is really noisy now, so it wont be clear anyway. But i'll try to upload something later.
The sound and heating up worries me. What could be wrong. Please help.
Thanks
Vivek
I'm writing an UART handler for the OMAP-L137 from the DSP side. And the code i wrote is as fallows
/* uart.c */
#include "uart.h"
#define DEV_BOARD
//#define CUSTOM_BOARD
void Uart_init()
{
#ifdef DEV_BOARD
UART1.DLL |= 0x64; //setting Baud Rate 115200
UART1.DLH |= 0x00;
UART1.FCR |= 0x0F; //FIFO enabling & receiver FIFO tigger level
UART1.LCR |= 0x03; //word length 8-bit
UART1.IER |= 0x07; //Enabling receiver interrupts
// UART1.IIR |= 0x00; // disabling FIFO Mode
UART1.MCR |= 0x00; //No auto control
UART1.MDR |= 0x1; //13x over sampling
UART1.PWREMU_MGMT |= 0x4001;
#endif
#ifdef CUSTOM_BOARD
UART1.DLL |= 0x2A; //setting Baud Rate 115200
UART1.DLH |= 0x00;
// UART1.DLH |= 0x09; //setting Baud Rate 9600
// UART1.DLL |= 0x64;
UART1.LCR |= 0x03; //word length 8-bit
UART1.IIR |= 0x00; // disabling FIFO Mode
UART1.MCR |= 0x00; //No auto control
UART1.MDR |= 0x1; //13x over sampling
//UART1.PWREMU_MGMT |= 0x4001;
UART1.PWREMU_MGMT |= 0x2001;
#endif
void send_data(char data)
{
while(UART1.IIR == 0x02)
{
if(UART1.LSR !=0x06)
UART1.RBR = data;
}
}
The project was build with no errors. but i am not getting anything in hyper terminal, so plz anyone tell me what i am doing wrong.
Hello All,
I am Using OMAPL137 for my custom application.
I need to communicate through SPI0 as slave with RTOS.
My configurations are as follows
I am not able to receive the interrupt.
My questions are.
1) I assume that as soon as Chip Select goes low interrupt will be generated for Slave. Is my understanding correct?
If not when the interrupt will be generated? and How DSP will receive interrupt?
2) Any other configuration is required for Interrupt setting In RTOS other than above mentioned setting?
3) How to debug in the RTOS whether is it able to receive the interrupt?
4) How to generate the interrupt from external device(specifically SPI0).
Waiting for your reply as soon as possible.
Thanks And Regards,
Vijay Hiremath
All:
I am trying to look at EMA_CLK with a logic analyzer, along with EMA_D[15:0], EMA_A[12:0], EMA_BA_1, EMA_BA0, EMA_WEn, EMA_OEn, and EMA_CSn_2.
I am running asynchronous mode, and I am able to sell all signals BUT EMA_CLK on a Logic Analyzer.
We have configured CE2CFG, and AWCC, and several pinmux's.
I have enabled pinmux6 for EMA_CLK, is there anything else I need to do to be able to see it? Does it need to be "enabled" to be output on GPIO2[7] on pin B7?
Hi,
I am thinking of interfacing ADS4122 to TMS320C6748 DSP for an IF application. It is desirable to sample at about 20~25MHz, 12bit.
The data will be sampled at 20MHz, continuously stream. If we could use DMA, a repeated transfer with DMA buffer size of 1024 (that's about 50us) will be great. Upon DMA interrupt of 1024pts, we'd like to FFT 1024pts using the DSPLIB, I think the FFT may complete within a short 15kcycles (32us if 456MHz?).
From wiki, it seems possible for the uPP interface to achieve this data transfer rate, possible upto 60MSPS for 12b ADC.
| Mode | Theoretical (MB/s) | Realistic (MB/s) |
| 1 Ch, 8-bit | 75 | 60 |
| 1 Ch, 16-bit | 150 | 120 |
I would to find out from here that,
1) Is my setup realistic? Can the C6748 interface to ADS4122 @ 20MSPS via DMA?
2) Will 1024pts FFT operation be fast enough and complete within such short period (32us)?
3) Is the internal RAM sufficient, as the data block is small size? Do you think if I need to include LPDDR SDRAM?
I am targeting a battery operated device, so power consumption is the main concern; thus limit the processor. I think the next choice may be FPGA, but I prefer not to go that path.
Thanks and regards,
Shanguo
Previous Post: e2e.ti.com/.../1765623
Right now I am trying to use Timer Interrupt to switch on/off GPIO. Here is part of the code:
/* Start the timer. */ TimerEnable(SOC_TMR_2_REGS, TMR_TIMER12, TMR_ENABLE_CONT);
/*
** Setup the timer for 64 bit mode
*/
static void TimerSetUp64Bit(void)
{
/* Configuration of Timer */
TimerConfigure(SOC_TMR_2_REGS, TMR_CFG_64BIT_CLK_INT);
/* Set the 64 bit timer period */
TimerPeriodSet(SOC_TMR_2_REGS, TMR_TIMER12, TMR_PERIOD_LSB32);
TimerPeriodSet(SOC_TMR_2_REGS, TMR_TIMER34, TMR_PERIOD_MSB32);
}However, ~52kHz seems to be the upper limit for the timer interrupt and I cannot increase it further when I reduce TMR_PERIOD_LSB32. As I am looking to have an interrupt at ~MHz range, is there anything I can change to achieve that?
Also, I have a difficult time to look up for the base frequency of the Timer. What section/page of the Manual I should look into?
Thank you.
Hi,
Which CCS Ver & debugging tools are compatible for OMAP-L138?
I try to to flash my development board OMAP-L138 LCDK with my DSP project. I follow intructions from http://processors.wiki.ti.com/index.php/OMAPL138_StarterWare_Booting_And_Flashing but I've got a failure:
>sfh_OMAP-L138.exe -flash_noubl boot.bin -targetType OMAPL138_LCDK -flashType NAND -p COM41
-----------------------------------------------------
TI Serial Flasher Host Program for OMAP-L138
(C) 2011, Texas Instruments, Inc.
Ver. 1.67
-----------------------------------------------------
[TYPE] Single boot image
[BOOT IMAGE] boot.bin
[TARGET] OMAPL138_LCDK
[DEVICE] NAND
[NAND Block] 1
Attempting to connect to device COM41...
Press any key to end this program at any time.
(AIS Parse): Read magic word 0x41504954.
(AIS Parse): Waiting for BOOTME... (power on or reset target now)
(AIS Parse): BOOTME received!
(AIS Parse): Performing Start-Word Sync...
(AIS Parse): Performing Ping Opcode Sync...
(AIS Parse): Processing command 0: 0x58535901.
(AIS Parse): Performing Opcode Sync...
(AIS Parse): Loading section...
(AIS Parse): Loaded 13500-Byte section to address 0x80000000.
(AIS Parse): Processing command 1: 0x58535901.
(AIS Parse): Performing Opcode Sync...
(AIS Parse): Loading section...
(AIS Parse): Loaded 1440-Byte section to address 0x800034BC.
(AIS Parse): Processing command 2: 0x58535906.
(AIS Parse): Performing Opcode Sync...
(AIS Parse): Performing jump and close...
(AIS Parse): AIS complete. Jump to address 0x80000000.
(AIS Parse): Waiting for DONE...
(AIS Parse): Boot completed successfully.
Waiting for SFT on the OMAP-L138...
File boot.bin is not present.
Interfacing to the OMAP-L138 via UART failed.
Please reset or power-cycle the board and try again...
What is wrong?