Part Number: TMDX654IDKEVM
Tool/software: Code Composer Studio
Hi All,
I am trying to upload and execute the ex11_ping example for the AM65X with BIOS. The example is located within C:\ti\ipc_3_50_03_05\examples\AM65XX_bios_elf. The following is true for my setup:
- CCS 910
- ipc_3_50_03_05
- pdk_am65xx_1_0_5
- processor_sdk_rtos_am65xx_6_00_00_07
Firsty, I am just attempting to upload the output binaries (built from the makefiles) onto the A53, R5f_0 and R5F_1 of the EVM, and execute it just in order to observe the expected output. For this, I know that the R5 core should be in split mode. I thus added the following line to my launch.js file:
...
...
// Connect targets
dsDMSC_0.target.connect();
//Add this to configure R5 cores in split mode
dsDMSC_0.expression.evaluate("Change_MCUSS_to_SplitMode()");
print("Loading DMSC Firmware...");
...
...Now I can successfully upload the output binaries to the A53 and R5F_0 cores and the cores halts at the main() functions. However, when attempting to upload the output binaries onto the R5F_1 core, the core immediate goes into the "Suspended" state after the binaries have been uploaded, with some xdc error functions running:
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A cant find source error is also displayed:
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What can be the cause of this error? I have not yet rebuilt the IPC examples, thus the output binaries came standard with the IPC component installation. I believe the error may be with incorrect board initialization and setup? Otherwise it might be incompatible versions of XDCtools/PDK/IPC etc. Could anyone please assist? Unfortunately there is only reference for uploading this example on the AM537X IDK, which I have referred to.
I then tried to import the source of the examples into a CCS project, and tried to get it building from there (I did this successfully with the MessageQ example). This would be the ideal way to go rather than the makefiles. With this method I get all three cores to build successfully, however,I have only been successful in uploading the A53 core output onto the EVM. When uploading the output binaries onto the R5F_0 and R5F_1 cores, the application simply executes immediately and never halts at the main() function. Thus I seem to not be able to configure my project correctly for these cores. Is it possible for someone to prepare a CCS project for this example, so that this can be used as baseline for development of our IPC application? Otherwise, please advise as to what might be the cause of the core never halting at main?
Here are some steps I applied to get the project to build from within CCS:
- Imported all the .c, .h, .cmd, and .cfg files related to the specific cores into a CCS project specific to that core. I also imported the files located it the "shared" folder of the example
-added profile="debug" as cfgArgs at Project Properties->XDCtools->Advanced options
- changed the include declarations to include the header files from the correct dictory ( #include "SvrMsg.h" instead of #include "..Shared/SvrMsg.h" for example)
- within the shared configuration file, I commented out the proclist.toUpperCase.split() command, and rather defined the array manually:
/* configure processor names */
//var procNameAry = MultiProc.getDeviceProcNames();
var procNameAry = [ "HOST","R5F-0", "R5F-1" ];
//var procNameAry = cfgArgs.procList.toUpperCase().split(/\s+/);
From here the projects builds successfully, however uploading and execution fails (The MessageQ example however executes successfully). Here I have also attached the CCS projects I have managed to create thus far, with successful build:
(Please visit the site to view this file)
Any assistance would be greatly appreciated.
Regards,
Johnny
