Part Number: PROCESSOR-SDK-TDAX

Hello.

I could enable debug trace params for TIDL when I assign log level and callback functions

(TIDL 00.08.00)

However, the log is not printed and the dump files is not generated at TIDL 00.09.00 version.

I set the parameters such as below

Are there additional parameters for enable logs and writing dump files?

If, Please let me know how to set the parameters.

setCreateParams()
{

+                 prms->traceLogLevel=1;
+                 prms->TIDLVprintf = vprintf;
+                 prms->traceWriteLevel = 1;
+                 prms->TIDLWriteBinToFile = writeBinToFile;

}

Regards

Part Number: TDA2P-ACD

Hi All,

I'm working on TDA2P-ACD board and Vision sdk 3.5 version

I'm getting output from capture link as one single frame which contains data of 4 cameras which I can differentiate using header information.

I want to separate out 4 frames to 4 separate buffers i. e. I want my link to output 4 SystemVideoBuffers. I cannot use Composite buffer as my next link is VPE which doesn't support composite buffer as input .

Please suggest how can I configure link with 1 input with 1 channel and gives 4 outputs

Is there any existing link in visionsdk that I can refer ?

Regards,

Megha

Part Number: TDA2P-ACD

Tool/software: Linux

Hi,

How can I raise DSP frequency to 1GHz?

Currently, when I run "omapconf show opp" this is the output.

| VDD_DSPEVE / VDD_CORE3 | 33C / 91F | NA | | PLUS |
| DSP1 | | | 850 MHz | |
| DSP2 | | | 850 MHz | |
| EVE1 | | | 900 MHz | |
| EVE2 | | | 900 MHz | |

In TRM it says that OPP_PLUS is supported and max frequency is 1GHz for DSP, but I have 850MHz.

Thanks in advance,

Igor

Part Number: TMS320C6678

Tool/software: Code Composer Studio

There are 10 ddr chips. Five chips is on the front of the board and connected to CS0, anthor five chips is on the back of the board and connected to CS1. There are one chip for ecc in every five chips.

The data width of each ddr chip is 16 bits .

There are no problems when the ddr frequency is below 1000MHz, also include 1000MHz. But the problem in picture below is arised when the frequency is 1600MHz. The picture below was got from high-speed oscilloscope.

My question: how to adjust the phase of clock to meet timing requirement.

Part Number: TMS320C6747

Tool/software: TI C/C++ Compiler

Hi Mr. Rahul

The trouble I asked about yesterday was solved.
There were extra files in the project directory. ".Project" etc

Then I started a new project and added the source files "LS041" and "boot2nd" in the same project with "Add Files".
Currently there are other errors.
1. Could you tell me the solution from the attached log?

2. There are many Platform_tci in the bios folder
There are no Platform_tc in the following three folders.
C: \ ti \
C: \ Program Files \ Texas Instruments
C: \ Users \ alex \ workspace_v5_5

3. Attach the file to be written to the external flash ROM.
Please tell me the user guide and the function name that make the file of this format.

Best Regards

Suzuki

The process I wrote yesterday is listed again last.

(Please visit the site to view this file)

(Please visit the site to view this file)

"Explanation of the process"

In the first place, the development results nine years ago include three source file groups attached: LS041.list, boot2nd.lst, and FROM.lst.

And since the BOOT function of DSP is small (2 KB at maximum) from the size of COPY from ROM, it is necessary to prepare 2nd BOOT, 2nd BOOT is started by the BOOT function of DSP, and the LS041 program is copied and executed by this 2nd BOOT. It was developed.
2KB of boot2nd is put at the head of external 256KB flash ROM.

It uses UARTHOST.EXE (TI) and Microsoft .NET Framework version 2.0.
I transfer the flash rewrite program: FROM_V100.BIN to the DSP in UART0 boot mode and then start automatically.

Next, send LS041V101.HEX by command instruction to FROM_V100.BIN using a HyperTerminal on Windows
Restart with DSP in NOR boot mode.

“” Read_me ”explains how to set the usage of source files etc. The contents of“ read_me ”are as follows.
**************************************************
・ Under My Documents \ workspace
   LS041 (Correlation operation program)
   boot2nd (Startup program)
   FROM (Flash ROM rewrite program)
   Copy folder

・ Install BIOS
   DSPBIOS5_41_03_17
   C6747_BIOSPSP_01_30_01
   EDMA3_LLD_BIOS5_01_11_00_03
   Run and install the setup in each folder

・ Copying DSP initialization setting file at ICE startup
   Copy evmc6747_dsp.gel to the C: \ Program Files \ Texas Instruments \ ccsv4 \ emulation \ boards \ evmc6747 \ gel folder
   Note: Since the evmc6747_dsp.gel file already exists in the copy destination folder, backup it if necessary.
**************************************************

TMDSCCS-ALLN01-v4.0 (Code Composer Studio IDE V4)
XDS510 USB (JTAG EMULATOR)
It was developed using.

Part Number: BEAGLEBK

Respected sir/ma'am,

                        I am trying to configure the SPI on beaglebone black for loop back. I have followed the procedure given in below link.

Now i want to verify that, if the pins are properly configured or not before moving further. So how can i verify that pins are properly configured and spi device has been enabled??

Regards,

Digvijay

Part Number: AM5728

Tool/software: Code Composer Studio

Hi,

One custom board based AM5728 working on full load means capturing, compressing and streaming two videos of resolution 1024x768 and one video of resolution 720x576. it is dissipating more heat means the junction temp reaches 105C in 30 mins without heat sink, 2hrs with heat sink.

we need the board to work for 48hrs.

please suggest what to do.

Other board with less load too dissipating accountable heat.

Is processor SDK need to be changed or optimized for thermal control, since even in idle condition too consuming more power.

BR

satya

Part Number: TDA2SX

We have developed a TDA2SX based custom board and have a SDD interfaced over SATA.

We are getting following errors, during enumeration and communication with hard disk. The disk gets enumerated, mounted and also read-write works well.

However, there are lot of errors as mentioned below being displayed. What is the reason for same? What is the signification of same with communication with disk?

What is the resolution for same?

[2019-08-02 16:25:45.473] ata1: SATA link up 1.5 Gbps (SStatus 113 SControl 310)
[2019-08-02 16:25:45.483] ata1.00: configured for UDMA/33
[2019-08-02 16:25:45.488] ata1: EH complete
[2019-08-02 16:25:46.703] ata1.00: exception Emask 0x12 SAct 0x1e0 SErr 0xa80501 action 0x6 frozen
[2019-08-02 16:25:46.712] ata1.00: irq_stat 0x0c000000, interface fatal error
[2019-08-02 16:25:46.723] ata1: SError: { RecovData UnrecovData Proto 10B8B BadCRC LinkSeq }
[2019-08-02 16:25:46.728] ata1.00: failed command: WRITE FPDMA QUEUED
[2019-08-02 16:25:46.731] ata1.00: cmd 61/40:28:3f:31:00/05:00:04:00:00/40 tag 5 ncq 688128 out
[2019-08-02 16:25:46.744]          res 40/00:28:3f:31:00/00:00:04:00:00/40 Emask 0x12 (ATA bus error)
[2019-08-02 16:25:46.744] ata1.00: status: { DRDY }
[2019-08-02 16:25:46.747] ata1.00: failed command: WRITE FPDMA QUEUED
[2019-08-02 16:25:46.761] ata1.00: cmd 61/c0:30:7f:36:00/02:00:04:00:00/40 tag 6 ncq 360448 out
[2019-08-02 16:25:46.761]          res 40/00:28:3f:31:00/00:00:04:00:00/40 Emask 0x12 (ATA bus error)
[2019-08-02 16:25:46.771] ata1.00: status: { DRDY }
[2019-08-02 16:25:46.771] ata1.00: failed command: WRITE FPDMA QUEUED
[2019-08-02 16:25:46.773] ata1.00: cmd 61/40:38:3f:39:00/05:00:04:00:00/40 tag 7 ncq 688128 out
[2019-08-02 16:25:46.785]          res 40/00:28:3f:31:00/00:00:04:00:00/40 Emask 0x12 (ATA bus error)
[2019-08-02 16:25:46.785] ata1.00: status: { DRDY }

Part Number: 66AK2H12

Hi,

We are trying to make the Linux kernel boot on the K2HK SoC, but there is a problem that seems to come down to memory management in the QMSS part of the NetCP driver. The kernel we are using is 4.19 because that is an LTS version.

Generically, what we are trying to achieve is to boot Linux over the 1 GB Ethernet interface. We can already have U-Boot load the kernel image using TFTP over the same network interface and therefor, this shouldn't be about a hardware problem. The step we are working on now is to have Linux kernel mount rootfs over NFS. For that, we need the driver for that interface in kernel to work, and that's when the problems start.

It seems that the problem is not in the driver for the interface but in the NetCP driver, or perhaps more specifically in the driver for the QMSS. That driver first allocates memory for a pool of descriptors related to DMA, then maps it to some virtual addresses and finally tries to access those virtual addresses. That last step leads to a failing paging request and a kernel Oops.

There is one interesting detail in this problem that is related to the amount of RAM in the hardware and the address ranges of the allocations/mappings. On the K2HK EVM, which has 2 GB of RAM, the driver works. The problems appear on custom hardware, which has the same SoC but 4 GB of RAM. Our debug prints show that the address ranges used are quite different depending on the amount of RAM.

Right now, our best guess is that something goes wrong with handling of pointers. With 2 GB of RAM, 32-bit pointers are enough, but having anything more requires more bits, and we are suspecting that they are not handled correctly.

One thing we have tried is to limit the amount of RAM seen by the kernel with kernel argument mem=2G. That fixed the issue and made address ranges on the EVM and our custom hardware similar, but it brought other issues. We are still analyzing them, but it looks as if not all parts of the kernel were abiding the limitation of memory.

At least for now, having the amount of RAM artificially limited to 2 GB would be an acceptable work-around, if it didn't bring in this another issue.

This leads to us having two alternative paths to follow: fixing the original problem leading to the kernel Oops or making the limiting of the amount of RAM work completely.

At least the problem leading to the kernel Oops originates from the TI driver code, so we wonder if we could get any help regarding it on this forum. As for the problem that comes with the attempt to limit the amount of RAM, we are not yet sure about the origins of that, but if it rings any bell on someone, we would be glad about any ideas.

Hi everybody,

I must reply on ethernet switch as fast as I can .

so I start communication when booting  with R5  controlling the switch and than need to handover to A72  and ideally would like the process to be as fast as possible and as easy as possible .

how can I implement the handover :

- do I need to reset the switch ?

- can I send an interrupt/signal to R5 so to leave control to main CortexA ? 

- can I simply pass  DMA  area  where data are  so to switch from  one to the other core ?  

any suggestion /idea ?

thank you 

best regards

Carlo

Part Number: TDA3XEVM

Tool/software: TI-RTOS

Hello.

Recently I had some experience with implementation of MPEG4venc alglink added in vsdk307 on TDA3xx.

I made it work after all, but only with some tricks like delayed mpeg4venc initialization or adding a gate link in the usecase etc. I can share the usecases if needed.

I still don`t really understand why it works like this and it will be nice if someone explain this to me or give something to read besides the MPEG4_Encoder_UserGuide.

Thanks.

Part Number: AM6548

Tool/software: Linux

Dear TI support team,

we're using the AM6548 on a custom hardware with the Processor SDK Linux, and have some questions regarding supported / planned features for the ethernet drivers/firmware:

• Our custom hardware uses two MII interfaces on the 1st ICSSG but only one MII interface on the 2nd ICSSG. The two interfaces on ICSSG #1 work just fine, but we didn't get the single interface on ICSSG #2 to work yet. Are there any pointers on how to configure (presumably device-tree?) the PRUSS for single MII mode? I saw this thread () that talks about how support for this was specifically added to the non-gigabit PRUSS. Is similar support already implemented or planned for the ICSSG?
• The icssg_prueth driver seems to support a "dual_icssg" mode, but I couldn't find an explanation yet what that means? It looks like it's somehow linking two ICSSGs, not just the two MII ports of a single ICSSG.
• Our custom hardware comes in variants that uses an MII connection to the PHY instead of the RGMII connection, because TI's Ethercat slave for example only supports the MII interface. Do the Linux and U-Boot drivers for the PRUSS Ethernet support use of the MII interface? We had a brief look at the code and couldn't find for example references to the ICSSG_ICSS_G_CFG.MII[0|1]_MODE bits. The icss_dualmac firmware source mentions RGMII/MII support, but says that MII only RX has been tested so far. Does the PRU firmware support MII mode? Is such support planned?

Regards,

Dominic

Part Number: AM5728

Dear Sir,

Board---Custom AM5728 Board

We are designing Custom AM5728 Board purpose of HD video annotation using h.264 CODEC. Due to space constraints we are not able to put eMMC /SD card. Only we are using QSPI FLASH.

Based on this design booting from QSPI Flash will happens or not without using eMMC/SD Card. then basically how to load boot.bin,uimage,devicetree,filesystem to AM5728 board.

Through JTAG Emulator application files we can load or not sir,

Please give me some suggestions,

Thanking you.

Regards,

Ramachandra

Part Number: TMS320C5535

Hi,

I have a SPI NOR Flash device with TMS320C5535 and would like to transfer file from PC to the Flash via USB.

Is there any example code that I can refer to as device needs to have a file system. 

I saw the USB Full Speed Example Project in the Chip Support Library 3.08 but that uses transfer of files between PC and MMC/SD Card.

As mine is a 'raw' device how do I go about it.

Thanks and Regards,

Sangeeta Gunwani

Part Number: PROCESSOR-SDK-AM437X

Tool/software: Code Composer Studio

Hi all,

I created the NIMU_BasicExample_evmAM437x_armExampleproject for my AM437x EVM via the pdkProjectCreate.bat file:

pdkProjectCreate.bat AM437x evmAM437x little nimu all arm

However when importing the created project into a workspace and building it, I receive the following warning:

"_SYS_SELECT_H" redefined

According to the build log the first definition can be found at c:\ti\bios_6_75_02_00\packages\gnu\targets\arm\libs\install-native\arm-none-eabi\include\sys\select.h, whereas the warning (redefinition) occurs in the socketndk.h file

Why is this warning present in a generated example project? Is it a known warning that I should be concerned about or can it be ignored?

The following is true for my setup:

- CCS  Version: 9.1.0.00010

- Processor SDK: v1_0_14

- ndk_3_40_01_01 

- GNU v7.2.1 (linaro)

Regards,

Johhny

Part Number: TMS320C5517

Hi Experts,

Is it possible to utilize UHPI and EMIF simultaneously?

It seems some pins are overwrapped.

Thank you for your check.

Best regards,
Hitoshi

Part Number: NDKTCPIP

Hi there,

I run into an issue NDK_accept() returning EINVAL accidentally despite it shouldn't.

I think I found a bug in NDK implementation. I debugged it in v2.25.0.9, the code of current c2.25.1.11 looks the same (stack/fdt/socket.c):

SOCKET NDK_accept( SOCKET s, PSA pName, int *plen )
{
    FILEDESC *pfd = (FILEDESC *)s;
...
    /* If there's a name, there must be a valid length */
    if (pName && (!plen || (pName->sa_family == AF_INET && *plen < sizeof(SA_IN)) 
#ifdef _INCLUDE_IPv6_CODE      
        || (pName->sa_family == AF_INET6 && *plen < sizeof(SA_IN6))
#endif
       ))
    {
        error = EINVAL;
        goto accept_error;
    }
...
    /* Get the connected address */
#ifdef _INCLUDE_IPv6_CODE      
    if (pfd->Type == HTYPE_SOCK6)
    {
        if (pName)
            Sock6GetName(pfdnew, 0, pName);
        if (plen)
            *plen = sizeof(SA_IN6);
    }
    else
#endif
    {
        if (pName)
            SockGetName(pfdnew, 0, pName);
        if (plen)
            *plen = sizeof(SA_IN);
    }
...
}

The code checks pName->sa_family to decide if it expects IPv4 or IPv6 and thus checks if the size of the struct is sufficient for IPv4 or IPv6 either.

The documentation (spru524j) clearly says "The argument addr is a result parameter that is filled in with the address of the connecting entity as known to the communications layer." So the code should not check its contents! As I called NDK_accept() with pName as a reference to an uninitialized local var NDK_accept() checked some value in the stack. Depending on the program flow history pName->sa_family happened to be AF_INET6 (10). As I am working with IPv4 it complained about the size of the struct being less than sizeof(SA_IN6) and returned unexpectedly with EINVAL.

Since NDK_accept() decides depending on pfd->Type == HTYPE_SOCK6 if it wants to fill a SA_IN6 or SA_IN struct I think it should check pfd->Type too to decide which size it expects.

I changed

    if (pName && (!plen || (pName->sa_family == AF_INET && *plen < sizeof(SA_IN)) 
#ifdef _INCLUDE_IPv6_CODE      
        || (pName->sa_family == AF_INET6 && *plen < sizeof(SA_IN6))
#endif
       ))

to

    if (pName && (!plen || ((pfd->Type == HTYPE_SOCK) && *plen < sizeof(SA_IN))
#ifdef _INCLUDE_IPv6_CODE
        || ((pfd->Type == HTYPE_SOCK6) && *plen < sizeof(SA_IN6))
#endif
        ))
and now it works fine for me.

May be you want to accept this bugfix ...

Best regards,
Lars

Part Number: AM5728

Understand this a very old part.  Customer looking for BSDL file for TMS320C50PQ-57

Part Number: 66AK2H06

Hi E2E,

What is the difference between 66AK2H06DAAW2 and 66AK2H06AAAW2?

Between H06 and the AAW, what do A and D signifies?

There is also a part number 66AK2H06BAAW2, with letter B.

I understand that the only active parts are 66AK2H06Dxxxxx.

Thanks in advance for your help.

Regards,
Carlo