Part Number: TDA2E

Hello,

I am using Radar TDA2 SDK (PROCESSOR_SDK_RADAR_03_07_00_00). I have compilation on windows. I have compiled the SDK with following option

set MAKEAPPNAME=apps
set MAKECONFIG=tda2xx_cascade_bios_radar
gmake -s -j8 depend
gmake -s -j8

Now next step for me is to flash this image. So i started following the VisionSDK_UserGuide_TDA2xx.pdf  under section 3.6 (load using SD card) so i opted for option 3.6.1 (Option 1: Steps to prepare a bootable SD card ) and made the card bootable.

So i went to step 3.6.3 (Steps to generate MLO) and than i saw a new folder comes up under C:\PROCESSOR_SDK_RADAR_03_07_00_00\vision_sdk\binaries\apps with name tda3xx_evm_bios_radar even thogh my compilation was for tda2xx_cascade_bios_radar. I guess it was ok.

After this i did step 3.6.4 (Steps to generate appImage ).

Now the document in section 3.6.5 says i need to copy this generated MLO and App files.(Once the AppImage and MLO are generated , Copy the MLO and AppImage at root folder of formatted SD Card)

But i cannot able to see which App and MLO files i need to copy to root folder.

My question form where i can get these files to be copied

My folder structures are 

For vision_sdk\binaries\apps

C:\PROCESSOR_SDK_RADAR_03_07_00_00\vision_sdk\binaries\apps>dir
Directory of C:\PROCESSOR_SDK_RADAR_03_07_00_00\vision_sdk\binaries\apps

07/24/2019 08:26 AM <DIR> .
07/24/2019 08:26 AM <DIR> ..
07/23/2019 03:52 PM <DIR> tda2xx_cascade_bios_radar
07/24/2019 08:36 AM <DIR> tda3xx_evm_bios_radar

Inside tda3xx_evm_bios_radar

C:\PROCESSOR_SDK_RADAR_03_07_00_00\vision_sdk\binaries\apps\tda3xx_evm_bios_radar>dir
Volume in drive C is Windows
Volume Serial Number is 4EAB-E65F

Directory of C:\PROCESSOR_SDK_RADAR_03_07_00_00\vision_sdk\binaries\apps\tda3xx_evm_bios_radar

07/24/2019 08:36 AM <DIR> .
07/24/2019 08:36 AM <DIR> ..
07/24/2019 08:36 AM <DIR> nor_flash_writer
07/24/2019 08:35 AM <DIR> qspi_flash_writer
07/24/2019 08:36 AM <DIR> sbl
07/24/2019 08:29 AM <DIR> ti
07/24/2019 08:26 AM <DIR> vision_sdk

tda3xx_evm_bios_radar\sbl

C:\PROCESSOR_SDK_RADAR_03_07_00_00\vision_sdk\binaries\apps\tda3xx_evm_bios_radar\sbl>dir

Directory of C:\PROCESSOR_SDK_RADAR_03_07_00_00\vision_sdk\binaries\apps\tda3xx_evm_bios_radar\sbl

07/24/2019 08:36 AM <DIR> .
07/24/2019 08:36 AM <DIR> ..
07/24/2019 08:34 AM <DIR> mflash_uart
07/24/2019 08:34 AM <DIR> nor
07/24/2019 08:36 AM <DIR> nor_flash_writer
07/24/2019 08:31 AM <DIR> qspi
07/24/2019 08:35 AM <DIR> qspi_flash_writer
07/24/2019 08:32 AM <DIR> qspi_sd

Can someone please tell me what and which files i need to copy into root folder of the SD card to use the Sw i bring up. This is the first time i am trying to bring up this board.

Br 

Deepak Joshi

Part Number: TCI6638K2K

Tool/software: TI C/C++ Compiler

I am trying to build PDK by following the steps in the link below:

http://wiki.ti.com/index.php/MCSDK_UG_Chapter_Developing_PDK#Build_guidelines_for_ARM_User_Mode_LLDs

The env configuration file 'armv7setupenv.sh' in pdk_keystone2_3_01_04_07/packages/ is attached for your reference.

Building successfully, but when I ran one example binary named as 'cppiExample.out' on target board, one error occurs with output "No such file or directory". I also tried to build a simple application as "hello word" with the cross toolchain, it has no problem when hello demo runs on target board. What is wrong for me? May I have your comments or ideas? Thanks,

I am blocked to attached the armv7setupenv.sh file, so paste its content here:

#!/bin/sh

############# BEGIN MODIFICATION TO MATCH HOST BUILD ENVIRONMENT #############
# Device to be built
export DEVICE=k2k

# ARM cross tool executable path
if [ -z "$CROSS_TOOL_INSTALL_PATH" ]; then
export CROSS_TOOL_INSTALL_PATH=/media/DATA/mcsdk-src/gcc-linaro-arm-linux-gnueabihf-4.9-2014.07_linux/bin
fi
echo "CROSS_TOOL_INSTALL_PATH set to $CROSS_TOOL_INSTALL_PATH"

# ARM cross tool prefix
export CROSS_TOOL_PRFX=arm-linux-gnueabihf-

# DEBUG FLAG: Set this to blank for a non-debug build
#export DEBUG_FLAG=-g

export LINUX_DEVKIT_INSTALL_PATH=/media/DATA/mcsdk-src/ti/linux-devkit/sysroots/cortexa15t2hf-vfp-neon-linux-gnueabi
# Linux DEVKIT path: Set this to linux devkit path install location from MCSDK
# example as below
# export LINUX_DEVKIT_INSTALL_PATH=$HOME/MCSDK_3.0/May-20/mcsdk_linux_3_00_00_11/linux-devkit/sysroots/armv7ahf-vfp-neon-oe-linux-gnueabi

if [ ! -z "$LINUX_DEVKIT_INSTALL_PATH" ]; then
echo LINUX_DEVKIT_INSTALL_PATH is set
else
echo LINUX_DEVKIT_INSTALL_PATH is not set
fi

# Default Output directory for generated binaries and objects
export ARMV7LIBDIR=$PWD/../lib/armv7
#Modify to Linux Dev Kit Lib Path
if [ ! -z "$LINUX_DEVKIT_INSTALL_PATH" ]; then
export ARMV7LIBDIR=$LINUX_DEVKIT_INSTALL_PATH/usr/lib
fi

# PDK install path
#Modify to Linux Dev Kit include Path
export PDK_INSTALL_PATH=$PWD
if [ ! -z "$LINUX_DEVKIT_INSTALL_PATH" ]; then
export PDK_INSTALL_PATH=$LINUX_DEVKIT_INSTALL_PATH/usr/include
fi

#Modify HPLIB_INSTALL_PATH to Linux Dev Kit include Path
export HPLIB_INSTALL_PATH=$HOME/ti/mcsdk_3_00_00_11/transport_net_lib_1_0_0_6/packages
if [ ! -z "$LINUX_DEVKIT_INSTALL_PATH" ]; then
export HPLIB_INSTALL_PATH=$LINUX_DEVKIT_INSTALL_PATH/usr/include
fi

#Modify IPC_INSTALL_PATH to Linux Dev Kit include Path
#Keystone IPC path must come from DEVKIT due to file organization
if [ ! -z "$LINUX_DEVKIT_INSTALL_PATH" ]; then
export IPC_INSTALL_PATH=$LINUX_DEVKIT_INSTALL_PATH/usr/include/ti/ipc
else
export IPC_INSTALL_PATH=error
echo "WARNING: IPC Transports will fail to build with this IPC_INSTALL_PATH configuration"
fi
echo "IPC_INSTALL_PATH set to $IPC_INSTALL_PATH"

#Modify SA_INSTALL_PATH to Linux Dev Kit include Path
export SA_INSTALL_PATH=$PWD
if [ ! -z "$LINUX_DEVKIT_INSTALL_PATH" ]; then
export SA_INSTALL_PATH=$LINUX_DEVKIT_INSTALL_PATH/usr/include
fi
echo "SA_INSTALL_PATH set to $SA_INSTALL_PATH"

#SA LLD Library path
# Modify to match the actual armv7 sa lld library build path
export ARMV7SALIBDIR=$SA_INSTALL_PATH/ti/drv/sa/lib/armv7

# HPLIB library path
# Modify to match the actual armv7 sa lld library build path
export ARMV7HPLIBDIR=$HPLIB_INSTALL_PATH/ti/runtime/hplib/lib/armv7

#Modify IPC_DEVKIT_INSTALL_PATH to Linux Devkit include path (or standalone ipc install path)
export IPC_DEVKIT_INSTALL_PATH=$HOME/ipc_install_path
if [ ! -z "$LINUX_DEVKIT_INSTALL_PATH" ]; then
IPC_DEVKIT_INSTALL_PATH=$LINUX_DEVKIT_INSTALL_PATH/usr
fi
echo IPC_DEVKIT_INSTALL_PATH is set to $IPC_DEVKIT_INSTALL_PATH
############# END MODIFICATION TO MATCH HOST BUILD ENVIRONMENT #############

export ARMV7BINDIR=$PWD/../bin/$DEVICE/armv7
export ARMV7OBJDIR=$PWD/../obj/$DEVICE/armv7

export NWAL_INSTALL_PATH=$PDK_INSTALL_PATH
export PKTLIB_INSTALL_PATH=$PDK_INSTALL_PATH

# Export CORE type
export CORE=armv7

export QMSS_SRC_DIR=$PWD/ti/drv/qmss
export CPPI_SRC_DIR=$PWD/ti/drv/cppi
export SRIO_SRC_DIR=$PWD/ti/drv/srio
export PA_SRC_DIR=$PWD/ti/drv/pa
export SA_SRC_DIR=$PWD/ti/drv/sa
export NWAL_SRC_DIR=$PWD/ti/drv/nwal
export RM_SRC_DIR=$PWD/ti/drv/rm
export HYPLNK_SRC_DIR=$PWD/ti/drv/hyplnk
export SRIO_SRC_DIR=$PWD/ti/drv/srio

if [ -z "$HPLIB_INSTALL_PATH" ]; then
echo "WARNING HPLIB_INSTALL_PATH environment not being set. Required for building NWAL Test"
echo "PDK Libraries can be still built using make lib"
fi
echo "Build Environment configured. Run make to build targets "

Part Number: PROCESSOR-SDK-AM335X

Dear,

I would like to program  a HW revision number for my AM335x board.

I don't want to add extra piece of HW on my board or use GPIO. Is there a non volatile area in am335x MCU that can be reused to store a data?

Sébastien

Part Number: TDA2E

Tool/software: Linux

Hi,

I used uart5 to receive gps data,  

but i found when rx receive gps data,

in the same time, the tx also transfer the same gps data,

this made me very confused,

then I comment the code that was used to parse the gps data,

the code below just open uar5 device,

int gps_open_tts()
{
	int ret = -1;
	char dev_path[] = "/dev/ttyS4";
//	Vps_printf("gggg = %s\n", dev_path);

	fdGPS = open(dev_path, O_RDONLY|O_NOCTTY|O_NONBLOCK|O_SYNC);
	if(fdGPS < 0){
		printf("GPS is not available now!!!!\n");
		ret = -1;
	}else{
		printf("GPS open successful, fd = %i\n", fdGPS);
		ret = 1;
	}
	//getTimeZone();
	return ret;
}

still have the same phenomenon above metion,

and there is also confirm no hard short circuit between rx and tx.

so what's happened?

Part Number: AM5706

Tool/software: Linux

Hello,

I have prepared a MLO and u-boot.img and loaded them to eMMC.

eMMC was configured by the next way - 

=> mmc part

Partition Map for MMC device 0 -- Partition Type: EFI

Part Start LBA End LBA Name
Attributes
Type GUID
Partition GUID
1 0x00000300 0x000010ff "bootloader"
attrs: 0x0000000000000000
type: ebd0a0a2-b9e5-4433-87c0-68b6b72699c7
guid: d117f98e-6f2c-d04b-a5b2-331a19f91cb2
2 0x00001500 0x00e87fde "rootfs"
attrs: 0x0000000000000000
type: ebd0a0a2-b9e5-4433-87c0-68b6b72699c7
guid: 25718777-d0ad-7443-9e60-02cb591c9737

MLO was loaded to 0x100 and 0x200 addresses. u-boot.img was loaded to 0x300 address.

After resetting I get the next errors - 

U-Boot SPL 2018.01-g313dcd69c2 (Jul 24 2019 - 12:23:13)
DRA722-GP ES2.1
Trying to boot from MMC2_2
no pinctrl state for default mode
i2c_write: error waiting for addr ACK (status=0x116)
tps65903x: could not set LDO1 voltage.
spl: could not find mmc device. error: -19
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###

My eMMC is physically linked to mmc2. But I am don't know why spl is trying to load image from MMC2_2 and how to change it.

That is the part of dts related to mmc -

&mmc2 {
status = "okay";

pinctrl-names = "default";
pinctrl-0 = <&mmc2_pins_default>;

bus-width = <8>;
ti,non-removable;
cap-mmc-dual-data-rate;
};

Thanks

Part Number: AM5728

Tool/software: Linux

Hello

Our Video circuit : 

Component Video  => ADV7403 => AM5728 (vin3a of VIP2)

We have configure ADV7403 to YUV 16 bit ( YVYU).

Based on media-bus-format.h (/include/uapi/linux/media-bus-format.h) and videodev2.h (/include/uapi/linux/videodev2.h) we should use :

MEDIA_BUS_FMT_YVYU8_1X16  and V4L2_PIX_FMT_YVYU for our configuration.

But in /driver/media/platform/ti-vpe/vip.c we see this in line 248 : /* V4L2 currently only defines one 16 bit variant */

which is for RAW16, not YVYU16.

Questions :

1_ Does V4L2 and VIP supports 16 bit YVYU or not? how we can add this input format ?

2_ Where we should set input format in media decoder chip driver (please you explain it based on ADV7180 driver)

3_ Should the video input format be set to decoder IC driver only or need changes in vip.c, vpe.c, ...?

Best Regards.

Part Number: AM4376

Tool/software: Linux

Hi all,

I have a quite slow GPMC device: 190 ns per byte.

So, the idea was to use DMA for async access.

I've started DMA read access over 16 KByte and tried to get with memcpy 2 bytes simultaneously.

Measured time for these 2 bytes was 97 usec. That results from 512 bytes X 190 ns DMA access.

Question: Is there a possibility to configure FIFO size ? I would prefer to work with 32 bytes instead of 512.

Part Number: TMDX654IDKEVM

Tool/software: TI-RTOS

Hello , I'm trying to test out the Ethernet comm. in RTOS with an External Ethernet Interface/Wireshark , can you tell me of some working examples existing in the sdk (5.03) where some packets (udp/arp/tcp) are sent out ? Besides the diagnostic example ( I don't have a loopback adapter).

Part Number: TDA2EVM5777

Hi, 

I am doing one experiment with object detection model similar to SSD model given caffe-jacinto-models.

Experiment 1:

1. Trained the model with 2 classes

- caffe-jacinto training is successful

- importing is also done without any issue

- While host emulation inference, Pooling layer failed is coming.

Infer Log-

14, TIDL_ConcatLayer , 1, 2 , 1 , 12 , 13 , x , x , x , x , x , x , 14 , 1 , 128 , 73 , 73 , 1 , 256 , 73 , 73 ,
15, TIDL_PoolingLayer , 1, 1 , 1 , 14 , x , x , x , x , x , x , x , 15 , 1 , 256 , 73 , 73 , 1 , 256 , 37 , 37 ,
16, TIDL_ConvolutionLayer , 1, 1 , 1 , 15 , x , x , x , x , x , x , x , 16 , 1 , 256 , 37 , 37 , 1 , 32 , 37 , 37 ,

Layer 14 : Max PASS : 64770 : 64770 Out Q : 7669 , 65024, TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, 0.00, Sparsity : -1.#J, -1.#J
Layer 15 :[0][5][36] - outData - 0 outputRef - 3 TIDL_PoolingLayer, FAILED!!!!!! #MMACs = 0.35, 0.00, 0.35, Sparsity : 0.00, 100.00
Layer 16 : Max PASS : 111919 : 111919 Out Q : 14302 , 112358, TIDL_ConvolutionLayer, PASSED #MMACs = 11.21, 10.97, 12.79, Sparsity : -14.06, 2.16

Let me know , what should be the reason is?

Can we ignore this Failed Warning?

Part Number: 66AK2H14

Hi everyone!

I am trying to setup DDR3B in 32-bit, do you have any example of code in order to proceed.

Regards,

François

Part Number: BEAGLEBK

Tool/software: Linux

I'm using am335x with ti linux sdk 5.03.In matrix gui , I run multimedia->aac decoder to test sound card,but it plays no voice, and in console shows a message "tlv320aic3x-codec 1-001b: Unable to sync registers 0x3-0x5. -121".

My board using aic3106 with i2s. The pins connectted between aic3106 and am335x are:

C18 <-> AUDIO_RESET

I2C1_SCL <> SCL

I2C1_SDA <> SDL

MCASP1_FSX <> WCL

MCASP1_ACLKX <> BCLK

MCASP1_AXR1 <> DIN

MCASP1_AXR0 <> DOUT

dvdd <> ldo3

drdd <> ldo2

avdd <> ldo2

iovdd <> ldo2

My devicetree 's audio part is this:

mymcasp1_pins_default: mymcasp1_pins_default {
        pinctrl-single,pins = <
            AM33XX_IOPAD(0x9a0, PIN_OUTPUT_PULLUP | MUX_MODE3) /* (B12) mcasp0_aclkr.mcasp1_aclkx */
            AM33XX_IOPAD(0x9a4, PIN_OUTPUT_PULLUP | MUX_MODE3) /* (C13) mcasp0_fsr.mcasp1_fsx */
            AM33XX_IOPAD(0x9a8, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* (D13) mcasp0_axr1.mcasp1_axr0 */
            AM33XX_IOPAD(0x9ac, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* (A14) mcasp0_ahclkx.mcasp1_axr1 */
        >;
    };

&mcasp1{
    pinctrl-names = "default";
    pinctrl-0 = <&mymcasp1_pins_default>;

    status = "okay";

    #sound-dai-cells = <0>;
    op-mode = <0>;/* MCASP_IIS_MODE */
    tdm-slots = <2>;
    /* 4 serializers */
    serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
        1 2 0 0
    >;
    tx-num-evt = <32>;/*fifo level*/
};


/ {
    model = "TI AM335x BeagleBone Black";
    compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";

    sound {
            compatible = "simple-audio-card";
            simple-audio-card,name = "am335x-snd";

        simple-audio-card,widgets =
            "Headphone", "Headphone Jack",
            "Line", "Line In";
        simple-audio-card,routing =
            "Headphone Jack",   "HPLOUT",
            "Headphone Jack",   "HPROUT",
            "LINE1L",       "Line In",
            "LINE1R",       "Line In";

            simple-audio-card,format = "i2s";
            simple-audio-card,bitclock-master = <&sound_master>;
            simple-audio-card,frame-master = <&sound_master>;

            simple-audio-card,cpu {
                sound-dai = <&mcasp1>;
            };

            sound_master: simple-audio-card,codec {
                sound-dai = <&tlv320aic3106>;
                system-clock-frequency = <12000000>;
            };
    };


};

Part Number: PROCESSOR-SDK-AM335X

Tool/software: TI-RTOS

Hi sir,

we are using AM3358 processor, we got some starterware sample code for GPIO module.

Facing problem on GPIO enable interrupt.if GPIO_IRQSTATUS_SET0 , GPIO_IRQSTATUS_SET1 are enabled at module level.but automatically GPIO_IRQSTATUS_CLR0 , GPIO_IRQSTATUS_CLR1,eventually disabling IRQ. Therefore GPIO_isr function is not invoked.

Due to the above stated behavior we are not able to realize the GPIO interrupt.

Thank you very much in advance.

Part Number: TMS320C6678

Tool/software: TI C/C++ Compiler

Hi there,

following two situation lead to different behavior and it is crucial to me to know why:

1.) Code includes a System_printf statement:

#pragma DATA_SECTION(selfId, ".local_data")
Uint32 selfId;
void main(void) {
    selfId = CSL_chipReadReg(CSL_CHIP_DNUM);
    System_printf("selfId = %d\n", selfId);
    config_cache(selfId);

....

2.) Code does not include a System_printf statement:

#pragma DATA_SECTION(selfId, ".local_data")
Uint32 selfId;
void main(void) {
    selfId = CSL_chipReadReg(CSL_CHIP_DNUM);
    config_cache(selfId);

....

In both cases .local_data maps to L2SRAM with L2SRAM defined in platform package as: {name: "L2SRAM",base: 0x00800000,len: 0x00080000,space: "code/data",access: "RWX" }. The same image is uploaded to each core:
    .local_data:       > L2SRAM

Function config_cache asserts that selfId is between 0 and 7. I am getting different results depending on whether I include the printf statement or not:

- For situation 1 (with System_printf), things work fine.

- For situation 2 (without System_printf), the code fails with an assertion error. Function config_cache seems to see some random values and the values are mixed up among cores: e.g. some cores all obtain selfId=3. I would understand this phenomenon if selfId would be placed in shared memory, but since it is placed in the cores local memory I don't understand it anymore.

Please help. Thank you very much.

Part Number: 66AK2G12

Tool/software: TI-RTOS

Dear All,

First the tools I use:

Processor: 66AK2G12

CCS 9.0.1.00004

CGT 8.3.4

XDC 3.55.0.11

SYS/BIOS 6.75.2.00

PDK 1.014

NDK 3.60.0.13

I have a problems with setting up NDK.

If i have NDK enabled and use any kind of print and additionally enable the compiler option --multithread the program gets stuck before main.

I tried to debug and this is what I found out: 

• during initialisation of std::cout some stream-buffer gets allocated
• this is directed to a pthreads lock 
• during accessing the semaphore of the lock the BIOS_getThreadType returns not TASK 
• this leads to an assert

I have created a test project that just prints on the CCS console. You can select between 3 print modes:

• XDC System_printf
• C printf
• C++ std::cout

This is working fine as long as the --multithread option is not set. If i enable it i no longer have dumps or even are not able to reach main.

I need help to figure out what is wrong. I already tried to set BIOS.rtsGateType to GateSwi that did not help completely.

Can someone try to reproduce and have a look at my CFG file, please?(Please visit the site to view this file)

Part Number: PROCESSOR-SDK-AM437X

Tool/software: Linux

Our application (written in C) polls on the GPIO input that informs us of data availability every 8 millisecond. However, the GPIO read (using both memmap and also the sys/class interface) sometimes takes more than that thereby resulting in overflow conditions (where we miss a read of a data byte).

Part Number: AM6527

Following up from a recent schematic review for the AM6527, our customer has the following question during their initial PCB design: 

We have only one additional question: Document : SPRSP08H –NOVEMBER 2017–REVISED JUNE 2019

Page 138 comment (2)

The VDDS[2:0]_WKUP, VDDS[8:0] are sourced from the same 1.8 V VDDSHV[2:0]_WKUP, VDDSHV[8:0] supply.

If VDDSHV[2:0]_WKUP, VDDSHV[8:0] is configured as 3.3 V, VDDS[2:0]_WKUP, VDDS[8:0] should be sourced from the internal IO bias

LDO.

Our use case (and also IDKJ) : VDDSHV[2:0]_WKUP is 1.8V rail and   VDDSHV[8:0] 3.3 V rail. Is this compliant with the rule above ?

Part Number: AM6527

On the device datasheet, page 105, notes 2 & 3:

(2) The net connecting CAP_VDDA_1P8_SDIO and VDDA_1P8_SDIO to VDDS6 or VDDS7 must be connected to a 3.3-uF decoupling capacitor. VDDA_1P8_SDIO, CAP_VDDA_1P8_SDIO, CAP_VDDSHV_SDIO, and VDDA_3P3_SDIO must be connected to VSS, when SDIO_LDO is not used with either MMC0 or MMC1.

(3) When CAP_VDDSHV_SDIO is connected to VDDSHV6 or VDDSHV7, the entire net which connects these pins should not exceed TBDuF of decoupling capacitance. When SDIO LDO is not used, this pin should be left unconnected.

For note 2, the evaluation board used a 1uF capacitor while the datasheet says 3.3uF. Can you confirm that 3.3UF is the correct value?

For note 3, we copied the evaluation board as well with a 1uF cap, but the total capacitance allowed is still marked as TBD on this latest revision datasheet. Do you know what that value should be?

Part Number: TMS320C6748

I currently have an issue with my code that causes an error in the UART.  The IIR INTID gives me a 011.  I've been able to read the contents of the register which clears the error status caused by an overrun error per the LSR register.  This is easily cleared by reading from the LSR register and that then changes the IIR INTID to 010.

Obviously the overrun is definitely an issue (Likely due to another interrupt service routine taking too long) but being able to recover from errors is important rather than the terminal just hanging.  To remove the 010 interrupt condition in the IIR, the Technical reference states you just need to read from the RBR which I have done with:

HWREG(SOC_UART_2_REGS + UART_RBR);

Yet when I read from the RBR the LSR still reflects that data is ready and the IIR reflects 010.

Being only a single byte setup in the FIFO I believe that just reading from the RBR should disable the interrupt.

Am I missing something from the Technical Reference Manual?

Part Number: PROCESSOR-SDK-AM57X

Tool/software: Linux

Hi,

I previously opened a thread on this issue here:  

The issue is stopping the M4 core can cause a hang.  The console port is unresponsive and the IDK board lights up 2 Red LEDs.

This the configuration I'm running with.   

Hardware:  TI IDK AM572X board

OS: Linux built using Yocto from the Linux SDK

Applications: Message Q example from the RTOS SDK typically installed in the directory ~/ti/ipc_3_47_02_00/examples/DRA7XX_linux_elf/ex02_messageq.

The software run is comprised of: app_host  and server_ipu2.xem4

The M4 executable is server_ipu2.xem4 which has been symbolically linked to dra7-ipu2-fw.xem4 which is the default image to use for ipu2.

The cores are started and stopped using the remoteproc driver as described here: software-dl.ti.com/.../Foundational_Components_IPC.html

I have created a test script which:

1. stops M4 core
2. starts M4 core
3. runs app_host
4. go back to step 1

Most of the time the hang occurs within 20 iterations of the loop.

The contents of my script:

=================================================

#!/bin/bash
# Basic until loop
counter=0

while true;
do
echo run $counter

echo 'stop M4 core'

cd /sys/bus/platform/drivers/omap-rproc
echo 55020000.ipu > unbind

sleep 1

echo 'start M4 core'
echo 55020000.ipu > bind

sleep 1

cd /home/<user>
./app_host_ti IPU2

sleep 1
counter=$((counter + 1))
done
done
echo All done

=================================

One thought I had is that a Linux driver is cleaning up the MessageQ and it references a pointer that is cleaned by stopping the core.  

Any insight would be appreciated.

Thanks,

Christine

Part Number: AM3358

Tool/software: Code Composer Studio

What is the files who define various hardware related constants and registers for AM3358? How can I have them?