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TDA2: Deep learning algorithms run very slowly on DSP(TDA2xx)

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Part Number:TDA2

Hi,

Deep learning algorithms run very slowly on DSP(TDA2xx)

image size is 512x256.

### CPU [  DSP1], LinkID [ 49],
[IPU1-0]    831.681815 s: 
[IPU1-0]    831.681845 s:  [ ALG_TIDL ] Link Statistics,
[IPU1-0]    831.681937 s:  ******************************
[IPU1-0]    831.681998 s: 
[IPU1-0]    831.682028 s:  Elapsed time       = 633812 msec
[IPU1-0]    831.682120 s: 
[IPU1-0]    831.682272 s:  New data Recv      =   0.2 fps
[IPU1-0]    831.682364 s: 
[IPU1-0]    831.682394 s:  Input Statistics,
[IPU1-0]    831.682455 s: 
[IPU1-0]    831.682516 s:  CH | In Recv | In Drop | In User Drop | In Process
[IPU1-0]    831.682577 s:     | FPS     | FPS     | FPS          | FPS       
[IPU1-0]    831.682669 s:  --------------------------------------------------
[IPU1-0]    831.682760 s:   0 |   0. 1      0. 0      0. 0           0. 1

Computational complexity:

thanks!


OMAP-L138: STW to PDK Migration - OMAP-L138

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Part Number:OMAP-L138

I'm working on an application using OMAPL138. In project my previous colleague using StarterWare.
I want to delete the STW and replace it with the PDK (currently used SYS/BIOS and mixed STW and PDK).
I encountered many problems (ex. function used by STW I have not found in a PDK).
Is removing STW from the project it's a good idea?


Best regards,
Patryk

AM6526: POWERLINK on AM65xx

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Part Number:AM6526

Hi,

We need POWERLINK solution on AM65xx. Do you know any third party can support it ? or have a plan ?
Do you know port GmbH or KUNBUS GmbH is preparing it ?
If they have, could you tell us schedule and contact person ?

Thanks and regards,
Hideaki Matsumoto

RTOS/PROCESSOR-SDK-AM65X: Processor SDK RTOS 05_01_00_11 to put in debug profile

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Part Number:PROCESSOR-SDK-AM65X

Tool/software: TI-RTOS

Hi Champs, 

I like to build with build-profile "debug" instead of "release". What to change?

Many thanks,

Thorsten

RTOS/TDA2P-ACD: IPC between M4-1 and EVE0

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Part Number:TDA2P-ACD

Tool/software: TI-RTOS

hi,all,

Now I met an issue:

M4-1 can sendNotify to EVE0, and trigger the callback of EVE0, 

However when EVE0 sendNotify to M4-1, and it can't trigger the callback of M4-1.

All ipc  of other cores are ok.

Thanks,

Harry

CCS/TMS320C6678: In TI-RTOS sdk 5.1 linker error: unresolved symbol Osal_qmssAccCsExit, Osal_qmssAccCsEnter, macAddress1.

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Part Number:TMS320C6678

Tool/software: Code Composer Studio

While compiling TI-RTOS sdk 5.1, linker has some issue like unresolved symbol. The problem might be missing the definition of these symbols. I am not able to find which file has the definition of these symbols. which path I have to include. Any changes is there in qmss for sdk 5.1 version. Please give some solution for the problem. It took long time for me.

Errors:
unresolved symbol Osal_qmssAccCsExit, first referenced in C:\ti\pdk_c667x_2_0_11\packages\ti\drv\qmss\lib\c66\ti.drv.qmss.ae66<qmss_acc.oe66> TRS_appC0    C/C++ Problem

unresolved symbol Osal_qmssAccCsEnter, first referenced in C:\ti\pdk_c667x_2_0_11\packages\ti\drv\qmss\lib\c66\ti.drv.qmss.ae66<qmss_acc.oe66> TRS_appC0    C/C++ Problem

unresolved symbol macAddress1, first referenced in C:/Users/ekula.s/workspace_v8/Platformlib/Debug/Platformlib.lib<cppi_qmss_mgmt.obj> TRS_appC0    C/C++ Problem 

Linux/TDA2PXEVM: System crash based on visionSDK 03 05

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Part Number:TDA2PXEVM

Tool/software: Linux

Hello,

When we power up the board, sometimes, system will crash, our board  based on visionSDK 03 05. We suspect that the temperature of the board is too high, but I'm not sure. Please find the log in the attachment. Could you help to have a look?

Thanks a lot

Terence

(Please visit the site to view this file)

Linux/AM3352: am3352 used 4 uarts ,but only two uarts outputs

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Part Number:AM3352

Tool/software: Linux

Hi,

On am3352 borad, I used 4 uarts( 0 1 3 4)  for data transmission, when write  the fd of the uarts, the uart3 and uart4 prints, but the uart0 and uart1 have no prints.

The code as follow:

struct termios newtio;

guint8 ch, i;

static const char g_uart_path[12][12]=
{
"/dev/ttyS0","/dev/ttyS1",
"/dev/ttyS3","/dev/ttyS4",
};

for(ch=0; ch<4; ch++)
{

g_uart_fd[ch] = open(g_uart_path[ch], O_RDWR | O_NOCTTY | O_NONBLOCK);
if(g_uart_fd[ch] < 0)
{
return false;
}

bzero(&newtio, sizeof(struct termios));
newtio.c_cflag = B115200 | CS8 | CREAD | CLOCAL | PARENB & (~PARODD);
newtio.c_iflag = IGNPAR;
tcflush(g_uart_fd[ch], TCIFLUSH);
tcsetattr(g_uart_fd[ch], TCSANOW, &newtio);
}

 char *buffer="55555555";

while(1)
{
for(i=0; i<1; i++)
{
write(g_uart_fd[i], buffer, strlen(buffer));
sleep(5);
printf("%d %s \r\n",i, buffer);
}
}


AM3357: If every AM3357 chip uses the same Ethernet MAC address for BOOT from EMAC with BOOTP and TFTP?

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Part Number:AM3357

Hi,

In technical reference manual 26.1.9.4.1, it says Ethernet MAC address comes from mac_id0_lo and mac_id0_hi.

I would like to know if the default value is all the same if the IC part number is the same?

E.g. all AM3357BZCZA30 use the same default MAC address for BOOTP?

Thanks.

Regards,

Nathan

TMS320C5517: byte addressable silicon C55x+? Is this available?

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Part Number:TMS320C5517

Hi, I'm lookign for low power dsp options that have are byte-addressable.

I see in the C5500 compiler stddef.h and other files there are #define options (__TMS320C55X_PLUS_BYTE__).

I have also seen a readmeplus.txt in the compiler folder.

Is this C55x+ a commercially available option? - I can't see any reference to it on the TI site.

AM4372: USB Dual role and OTG

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Part Number:AM4372

Hi Experts,

We would like to develop HOST and DEVICE roles products with AM4372.
It should operate as a DEVICE for normal and as a HOST if a wireless module is connected.
So, could you please let  me know what the Dual role function mean in the TRM.

According to e2e, AM437x does not support OTG.
However, OTG function is described in the source data ( device tree) or the block diagram for AM437x_GP_EVM.
So, is it possible to be the DEVICE or the HOST with AM4372?

Thank you very much for your kind check.

Best regards,
Hitoshi

CCS/EVMK2H: ARM-master or C66x-master boot-mode is used?

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Part Number:EVMK2H

Tool/software: Code Composer Studio

What boot-mode is used in EVMK2H? ARM-master or C66x-master?

If ARM-master mode is used and If I load the operating system Linux as is described in "Linux Getting Started Guide"

software-dl.ti.com/.../Overview_Getting_Started_Guide.html

 then will the kernels c66x be involved in work? 

Can I work with c66x under the control of the Linux system?

Second question.

In EVMK2H There is provided "0010:NOR SPI BOOT" mode (or No Boot/JTAG).

And if I load the operating system Linux as described in "Linux Getting Started Guide" is it loaded only in NOR whithout using NAND?

(NOR-flash is small !)

And one more.

Where BMC code of EVMK2H is located? In flash (NOR or NAND)?

If this code will be corrupted how can I restore it?

Regards, Alexander.

Linux/TMDSIDK574: omapconf not working on AM5748 CPU

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Part Number:TMDSIDK574

Tool/software: Linux

Hi

we are using Linux RT SDK 5.2.0.10 and tried 

omapconf show opp

It says:

"Warning: chip not recognized, running in safe mode (only platform-generic functions allowed).

 

Function disabled in safe mode, sorry…"

Is there a version available for AM5748 CPU?

Regards, Chris

TDA3: power consumption on each power rail of TDA3

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Part Number:TDA3

Dear Team,

My customer is designing HW using TDA3 and requesting maximum power consumption information on each power rails of TDA3 to design power rails.

I only find 'AutomatedPowerMeasurement' tool for TDA3, but I'm afraid it is hard for them to measure power using this tool.

Is there any other tool to check power consumption on each power rail of TDA3?

Thanks and Best Regards,

SI.

AM3358: TI-AM57xx-EVM

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Part Number:AM3358

Hi Kemal,

 Am also doing similar thing to access PWM on AM57xx-evm . Already open one thread for that. Can you please help me in this regards .

This change i have done under am57xx-evm-reva3.dts in /arch/arm/boot/dts

ehrpwm3a_pins: pinmux_ehrpwm3a_pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3794, PIN_OUTPUT | MUX_MODE10) /* mmc3_dat4.ehrpwm3A */
>;
};

ehrpwm3b_pins: pinmux_ehrpwm3b_pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3798, PIN_OUTPUT | MUX_MODE10) /* mmc3_dat5.ehrpwm3B */
>;
};

epwmss2: epwmss@48442000 {
compatible = "ti,dra7xx-pwmss", "ti,am33xx-pwmss";
reg = <0x48442000 0x30>;
ti,hwmods = "epwmss2";
#address-cells = <1>;
#size-cells = <1>;
status = "okay";

ranges = <0x48442100 0x48442100 0x80 /* ECAP */
0x48442180 0x48442180 0x80 /* EQEP */
0x48442200 0x48442200 0x80>; /* EHRPWM */

ehrpwm2: ehrpwm@48442200 {
compatible = "ti,dra7xx-ehrpwm",
"ti,am33xx-ehrpwm";
#pwm-cells = <3>;
reg = <0x48442200 0x80>;
ti,hwmods = "ehrpwm2";
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&ehrpwm3a_pins &ehrpwm3b_pins>;

};

Below is mine open thread for this issue :

e2e.ti.com/.../761768


CCS/TMS320DM642: evmdm642_edma_aic23.l64 File not found

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Part Number:TMS320DM642

Tool/software: Code Composer Studio

Dear Ti people,

I am working on one of the DSP boards DM642 v2 ,I have the DDK library but my project needs evmdm642_edma_aic23.l64 file,This file is not found in any of the supporting files which come up with the kit,

So it would be very helpful if any one can provide me the link for the file to be downloaded.

Thank You 

CCS/AM6548: AM654x R5F peripherals in CCS register's view not displayed correctly

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Part Number:AM6548

Tool/software: Code Composer Studio

Hi,

while trying to debug a problem with a TI-RTOS application running on a R5F core of a AM6548 on the AM654x_IDK board we came across a problem with the registers view in CCS. We wanted to examine the content of the MCU_TIMER<n> registers, but the CCS registers view apparently treats the MCU_TIMERs (and lots of other peripherals) as an internal bus firewall, i.e. it is displaying registers like CBA_CONTROL_i_j, CBA_PERMISSION_i_j_0 and so on. We had a look at C:\ti\ccsv8\ccs_base\common\targetdb\devices\AM6548.xml and it looks like many of the peripherals don't have the correct module definition. It also seems that the base addresses are often wrong:

<instance href = "../Modules/am65x/PSRAM0.xml" id = "MCU_TIMER0" xml = "PSRAM0.xml" xmlpath = "../Modules/am65x/" description = "" baseaddr = "0x45108000" size = "0x20" accessnumbytes = "1" permissions = "rw" />
                <instance href = "../Modules/am65x/PSRAM0.xml" id = "MCU_TIMER1" xml = "PSRAM0.xml" xmlpath = "../Modules/am65x/" description = "" baseaddr = "0x45108400" size = "0x20" accessnumbytes = "1" permissions = "rw" />
                <instance href = "../Modules/am65x/PSRAM0.xml" id = "MCU_TIMER2" xml = "PSRAM0.xml" xmlpath = "../Modules/am65x/" description = "" baseaddr = "0x45108800" size = "0x20" accessnumbytes = "1" permissions = "rw" />
                <instance href = "../Modules/am65x/PSRAM0.xml" id = "MCU_TIMER3" xml = "PSRAM0.xml" xmlpath = "../Modules/am65x/" description = "" baseaddr = "0x45108C00" size = "0x20" accessnumbytes = "1" permissions = "rw" />

We checked for updates within CCS, but there doesn't appear to be an update available.

Is this a known issue? Is there a fix planned?

RTOS/AM6548: TI-RTOS error message regarding dmtimer in TI-RTOS example applications

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Part Number:AM6548

Tool/software: TI-RTOS

Hi,

we tried building a TI-RTOS example application following the instructions from the processor sdk documentation:

http://software-dl.ti.com/processor-sdk-rtos/esd/docs/latest/rtos/index_examples_demos.html#arm-cortex-r5

We had problems before with SDK version 05.01 where the SBL was unable to load the application from a SD card (see https://e2e.ti.com/support/processors/f/791/p/750685/2778897?tisearch=e2e-quicksearch&keymatch=am6546#2778897?).

The SBL problems are gone with version 05.02, but we get an error about dmtimer frequency mismatch:

[MCU_PULSAR_Cortex_R5_0] ti.sysbios.timers.dmtimer.Timer: line 1162: E_freqMismatch: Frequency mismatch: Expected 25000000 Hz, actual: 174906832 Hz.  You need to modify Timer.intFreq.lo to match the actual frequency.
xdc.runtime.Error.raise: terminating execution

There are older posts about a similar problem, but that issue appears to be fxied in the SYS/BIOS version that comes with SDK 05.02:

Defects Fixed in SYS/BIOS 6.73.00 (Fixes since SYS/BIOS 6.70.00):

SYSBIOS-689 dmtimer Timer_checkFreq() failure due to caching


We're not sure if the dmtimer would have worked with SDK 05.01, but at least we didn't get that error message back then when we loaded the application via the debugger. With 05.02 we get that error message both when using the debugger and when loading the application via SBL from a SD card.

Is there a known issue regarding the dmtimer stuff on AM654x R5F with SDK 05.02? Are there any instructions on how these things should be set up, in case we're missing some necessary manual setup steps?



Compiler/TMDXSK437X: How to Debug the Board

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Part Number:TMDXSK437X

Tool/software: TI C/C++ Compiler

We have bought a device AM437x Starter Kit. We are going to use the GUI matrix and make some new program. I have several questions for this device. Could somebody helps me?

1) Do we have a method to debug the board? there is a USB cable to connect the device with the host Computer, it seems there is no instructions about how to use it to debug

2) In the program we need to call some 3rd device drivers which are written under general Linux OS. When creating new project by CCS6, do we use CCS project or general C++ project?

      2.1) if using CCS project, should we choose Crosss GCC or Linux GCC?

      2.2) if using general C++ project, do we choose TI V15.12.1.LTS compiler or GNU V4.9.3 (Linaro) compiler? 

3) I noticed there is no g++ compiler in the list, I suppose those GCC or TI V15.12.1.LTS or GNU V4.9.3 compilers are all right to handle the C++ project and 3rd party c++ device driver?

Thank you very much for the help!

AMIC110: Profinet device?

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Part Number:AMIC110

Hi,

I have found some documents that show that it is possible to operate the AMIC110 without external DDR Ram as EtherCat slave controller. Is it also possible to implement a Profinet device without DDR Ram on the AMIC110?

best regads

Thomas

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