Hi,
Recently I bought an OMAPL138LCDK board from TI and I found the board was loaded with some Linux bootloader inside its NAND FLASH. So I made the boot switch changes for Emulation Debug support. (DIP settings -> SW1,6,7,8 = ON, SW2,3,4,5 = OFF). Now I load my sample LED toggle application as given below. During the debug(the way I test my application) I can see the GPIO output register value changes as per code execution, but the LCDK board's 4LEDs stays always ON all the time during the code execution. In fact I get the code from the OMAPL138 starterware, and I made some slight changes but nothing more.
void OMAPL138LCDK_PINMUX_Setup(void)
{
unsigned int savePinmux = 0;
/*
** Clearing the bit in context and retaining the other bit values
** in PINMUX13 register.
*/
savePinmux = (HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_PINMUX(13)) &
~(SYSCFG_PINMUX13_PINMUX13_15_12));
/* Setting the pins corresponding to GP6[12] in PINMUX13 register.*/
HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_PINMUX(13)) =
(PINMUX13_GPIO6_12_ENABLE | savePinmux);
/*
** Clearing the bit in context and retaining the other bit values
** in PINMUX13 register.
*/
savePinmux = (HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_PINMUX(13)) &
~(SYSCFG_PINMUX13_PINMUX13_11_8));
/* Setting the pins corresponding to GP6[13] in PINMUX13 register.*/
HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_PINMUX(13)) =
(PINMUX13_GPIO6_13_ENABLE | savePinmux);
/*
** Clearing the bit in context and retaining the other bit values
** in PINMUX5 register.
*/
savePinmux = (HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_PINMUX(5)) &
~(SYSCFG_PINMUX5_PINMUX5_15_12));
/* Setting the pins corresponding to GP2[12] in PINMUX5 register.*/
HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_PINMUX(5)) =
(PINMUX5_GPIO2_12_ENABLE | savePinmux);
/*
** Clearing the bit in context and retaining the other bit values
** in PINMUX0 register.
*/
savePinmux = (HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_PINMUX(0)) &
~(SYSCFG_PINMUX0_PINMUX0_27_24));
/* Setting the pins corresponding to GP0[9] in PINMUX0 register.*/
HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_PINMUX(0)) =
(PINMUX0_GPIO0_9_ENABLE | savePinmux);
}
//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
int main(void) {
int i = 0;
/* The Local PSC number for GPIO is 3. GPIO belongs to PSC1 module.*/
PSCModuleControl(SOC_PSC_1_REGS, HW_PSC_GPIO, PSC_POWERDOMAIN_ALWAYS_ON, PSC_MDCTL_NEXT_ENABLE);
OMAPL138LCDK_PINMUX_Setup();
/* Sets the pin 109 (GP6[12]) as output.*/
GPIODirModeSet(SOC_GPIO_0_REGS, 109, GPIO_DIR_OUTPUT);
/* Sets the pin 110 (GP6[13]) as output.*/
GPIODirModeSet(SOC_GPIO_0_REGS, 110, GPIO_DIR_OUTPUT);
/* Sets the pin 45 (GP2[12]) as output.*/
GPIODirModeSet(SOC_GPIO_0_REGS, 45, GPIO_DIR_OUTPUT);
/* Sets the pin 10 (GP0[9]) as output.*/
GPIODirModeSet(SOC_GPIO_0_REGS, 10, GPIO_DIR_OUTPUT);
while(1)
{
GPIOPinWrite(SOC_GPIO_0_REGS, 109, GPIO_PIN_LOW);
GPIOPinWrite(SOC_GPIO_0_REGS, 110, GPIO_PIN_LOW);
GPIOPinWrite(SOC_GPIO_0_REGS, 45, GPIO_PIN_LOW);
GPIOPinWrite(SOC_GPIO_0_REGS, 10, GPIO_PIN_LOW);
Delay(100000);
GPIOPinWrite(SOC_GPIO_0_REGS, 109, GPIO_PIN_HIGH);
GPIOPinWrite(SOC_GPIO_0_REGS, 110, GPIO_PIN_HIGH);
GPIOPinWrite(SOC_GPIO_0_REGS, 45, GPIO_PIN_HIGH);
GPIOPinWrite(SOC_GPIO_0_REGS, 10, GPIO_PIN_HIGH);
Delay(100000);
}
}
MEMORY
{
#ifdef DSP_CORE /* DSP exclusive memory regions */
DSPL2ROM o = 0x00700000 l = 0x00100000 /* 1MB L2 DSP local ROM */
DSPL2RAM o = 0x00800000 l = 0x00040000 /* 256kB L2 DSP local RAM */
DSPL1PRAM o = 0x00E00000 l = 0x00008000 /* 32kB L1 DSP local Program RAM */
DSPL1DRAM o = 0x00F00000 l = 0x00008000 /* 32kB L1 DSP local Data RAM */
#endif
SHDSPL2ROM o = 0x11700000 l = 0x00100000 /* 1MB L2 Shared Internal ROM */
SHDSPL2RAM o = 0x11800000 l = 0x00040000 /* 256kB L2 Shared Internal RAM */
SHDSPL1PRAM o = 0x11E00000 l = 0x00008000 /* 32kB L1 Shared Internal Program RAM */
SHDSPL1DRAM o = 0x11F00000 l = 0x00008000 /* 32kB L1 Shared Internal Data RAM */
EMIFACS0 o = 0x40000000 l = 0x20000000 /* 512MB SDRAM Data (CS0) */
EMIFACS2 o = 0x60000000 l = 0x02000000 /* 32MB Async Data (CS2) */
EMIFACS3 o = 0x62000000 l = 0x02000000 /* 32MB Async Data (CS3) */
EMIFACS4 o = 0x64000000 l = 0x02000000 /* 32MB Async Data (CS4) */
EMIFACS5 o = 0x66000000 l = 0x02000000 /* 32MB Async Data (CS5) */
SHRAM o = 0x80000000 l = 0x00020000 /* 128kB Shared RAM */
DDR2 o = 0xC0000000 l = 0x20000000 /* 512MB DDR2 Data */
#ifndef DSP_CORE /* ARM exclusive memory regions */
ARMROM o = 0xFFFD0000 l = 0x00010000 /* 64kB ARM local ROM */
ARMRAM o = 0xFFFF0000 l = 0x00002000 /* 8kB ARM local RAM */
#endif
}
SECTIONS
{
.text > SHRAM
.stack > SHRAM
.bss > SHRAM
.cio > SHRAM
.const > SHRAM
.data > SHRAM
.switch > SHRAM
.sysmem > SHRAM
.far > SHRAM
.args > SHRAM
.ppinfo > SHRAM
.ppdata > SHRAM
/* TI-ABI or COFF sections */
.pinit > SHRAM
.cinit > SHRAM
/* EABI sections */
.binit > SHRAM
.init_array > SHRAM
.neardata > SHRAM
.fardata > SHRAM
.rodata > SHRAM
.c6xabi.exidx > SHRAM
.c6xabi.extab > SHRAM
}
