AM5716: AM5716 eMMC Read/Write Transfer Flow Without DMA With Polling

Part Number:AM5716

Hi Team,

Would you please teach me about eMMC Read/Write Transfer Flow Without DMA With Polling?

I’m referring TRM (SPRUHZ7H)

Q1. Why do we need to poll BWR or BRR before every write or read 4 bytes into the MMCi.MMCHS_DATA register In Figure 25-40. eMMC/SD/SDIO Controller Read/Write Transfer Flow Without DMA and With Polling?

Q2. There is the following description. I think it is inconsistent with the above ...  How do I understand?

25.4.7.1 Data Buffer

A read access to the MMCi.MMCHS_DATA register is allowed only when the buffer read-enable status is set to 1 (the MMCi.MMCHS_PSTATE[11] BRE bit); otherwise, a bad access (the MMCi.MMCHS_STAT[29] BADA bit) is signaled.

A write access to the MMCi.MMCHS_DATA register is allowed only when the buffer write-enable status is set to 1 (the MMCi.MMCHS_PSTATE[10] BWE bit); otherwise, a bad access (the MMCi.MMCHS_STAT[29] BADA bit) is signaled and the data are not written.

Q3. I want to raise the throughput. Is it better to use DMA?

Thanks and Best regards,

Kuerbis