SECDEVTOOL-OMAPL138C6748: How to wake up ARM from DSP Secondary Bootloader?

Part Number:SECDEVTOOL-OMAPL138C6748

Hi everybody,

I am writing a DSP secondary boot loader for secure enabled OMAP-L138 chip, in which I need to wake up ARM core and assign entrypoints to both ARM and DSP.

I have followed the example provided by Rahul (the first link) and read some useful threads in bellow:

My booting procedure is as follows:

1. DSP starts first with DSP ROM bootloader loads DSP secondary bootloader (SBL) into memory, transfers the control to DSP SBL and exits in SECUREWITHSK mode

2. DSP SBL load ARM and DSP application images into mDDr, decrypts them using Secure Kernel APIs and retrieve the two entrypoints. The process is in SECUREWITHSK mode

3. DSP SBL runs the PRUSS to write ARM reset vector to 0xFFFF0000, through which it wakes up ARM core and the ARM application starts to run. The process is still in SECUREWITHSK mode

4. DSP SBL switch to NONSECURE mode using SK_switchNonSec() API concurrently with transfering control to DSB user application. Now the entire system operates in non secure world.

The PRU code and ARM code to set the ARM reset vector is the same as in the example of Rahul.

/* PRU code */

unsigned int armBootDmaxCodeConst[] = {
0x24000080, // Load ARM vector table address to r0
0x24ffffc0,
0x24000081, // Load ARM code address to r1
0x240000c1,
0xf500e182, // Read ARM code from *r1 to r2,...
0xe500e082, // Write ARM code from r2,... to *r0
0x79000000, // Self loop
};

/* ARM boot ARM code */

unsigned int armBootArmCodeConst[] = {
0xEA000007, // vt0: B boot
0xEAFFFFFE, // vt0: Self loop
0xEAFFFFFE, // vt0: Self loop
0xEAFFFFFE, // vt0: Self loop
0xEAFFFFFE, // vt0: Self loop
0xEAFFFFFE, // vt0: Self loop
0xEAFFFFFE, // vt0: Self loop
0xEAFFFFFE, // vt0: Self loop
// jump:, DATA:
0x00000000,
// boot:
0xE51F000C, // LDR R0, jump
0xE1A0F000, // MOV PC, R0
};

My problem is that only DSP application runs, it seems that the ARM core has not been woken up yet. It is weird because some people were successful to run Rahul's exam code. My questions are:

1. Is my boot sequence correct?

2. Does the ARM entrypoint need to be in Shared RAM (mine is in DDR)?

3. Should I wake up the ARM core in NONSECURE mode or I can do it in SECUREWITHSK mode?

4. What are the posible solutions I should try?

Thanks in advance,