Deal all,
My project use a hardware like OMAP-L138LCK kit, and I have problem with power consumption and I focus on the system clock and DDR clock. Right now, system clock is 300Mhz, and DDR clock is 150Mhz.
1. My solutions is switching to by pass mode when the device is not used. The system clock can change while running, and I tested. But seem like DDR clock can not change? Anyone can confirm it for me?
"NOTE: PLLC1 should be configured and a stable clock present on 2X_CLK before releasing the
DDR2/mDDR memory controller from reset" -> this note from TI document.
2. I have an idea about using Share RAM area when device is not used, so i donot have to access to DDR area and this will save many power for device? am I right?
3. When the device start, I recognize that default bootloader take 200mW power, and it seem not right? any idea?
Thanks alot,
Nhan
