Dear experts,
I am using SPI to sample ADC data.And use DMA to transfer these data which is triggered by SPI read receive and write transmit events.At the beginning everything is fine,but when I configure L1D as SRAM, some ADC data lost.After that,I find the receiver overrun flag of SPI *** register(SPIFLG) is set ,besides of that EDMA3 event missed register(EMR) indicate Channel 19 and channel 15 event missed is set.Is there any wrong of my L1D configuration?Can you support some examples of DMA transfer SPI data?My configuration is as follows
void main()
{
Device_init();
//L1P ans L1D configured as SRAM
cacheregs->L1PCFG = 0;
cacheregs->L1DCFG = 0;
EDMA_copy_in(&L1P_copy_table);
memset((void*)L1D_copy_table.recs[0].run_addr,0,L1D_copy_table.recs[0].size);
…
for(;;){…}
}
cmd file
/* =========================================================================*
* Specify the System Mermory Map *
* =========================================================================*/
MEMORY
{
L2: o = 0x11800000 l = 0x00040000
L1P: o = 0x11E00000 l = 0x00008000
L1D: o = 0x11F00000 l = 0x00008000
SDRAM: o = 0x40000000 l = 0x02000000
FRAM: o = 0x64000000 l = 0x00080000
SHARERAM: o = 0x80000000 l = 0x00020000
}
/* =========================================================================*
* Specify the Sections Allocation into Memory *
* =========================================================================*/
SECTIONS
{
.cinit > L2 /* Initialization Tables */
.pinit > L2 /* C++ Constructor Tables */
.const > L2 /* Constant Data */
.switch > L2 /* Jump Tables */
.text > L2 /* Executable Code */
text > L2 /* ron_text add */
.L1PSRAM load = SDRAM, table(_L1P_copy_table), run = L1P /* ron_L1PD20150428 add */
.L1DSRAM table(_L1D_copy_table), run = L1D /* ron_L1PD20150428 add */
.ovly > SDRAM /* ron_L1PD20150428 add,Allocate copy tables */
.sdram > SDRAM
.shareram > SHARERAM
.bss > L2 /* Global & Static Variables */
.far > L2 /* Far Global & Static Variables */
.stack > L2 /* Software System Stack */
.sysmem > L2 /* Dynamic Memory Allocation Area */
.cio > L2 /* C I/O Buffer */
.vecs > L2 /* Interrupt Vectors */
}