Hello,
I'm using the PRU0 in the TMS320C6748 DSP. The PRU clock is running at 150MHz. I'm trying to trigger a GPO (R30.31) signal out of PRU based on the rising edge of the input GPI (R31.4) signal. The assembly code is given below:
LOOP1:
QBBC LOOP2, r31.t4
JMP LOOP1
LOOP2:
QBBS LOOPA, r31.t4
JMP LOOP2
LOOPA:
SET r30.t31
CLR r30.t31
SET r30.t31
CLR r30.t31
SET r30.t31
CLR r30.t31
SET r30.t31
CLR r30.t31
SET r30.t31
CLR r30.t31
From the oscilloscope (attached below), I could see that there is a delay of 44.6ns between the rising edge of the input signal and the output. To check if the PRU is clocking at the right frequency, I toggled the output line five times. The PRU is clocking at 150Mhz and there is no delay between the toggling. This means the delay is happening in between the QBBS instruction and the SET instruction. From the TI documentation in 
it says that both QBBS and SET instructions take 1 clock cycle per instruction to execute. Can anyone please help me understand why there is a delay between the two instructions?
Thanks,
Srinidhi Sreepad
(Please visit the site to view this file)