Quantcast
Channel: Processors forum - Recent Threads
Viewing all articles
Browse latest Browse all 17527

am1705 EMA_A address pins muxing, used for NAND flash

$
0
0

Hi all,

Things are working well with nand, no problems. What we are seeing is that once we mux the EMA_A[1] and EMA_A[2] for use as address lines to the nand device, the other unused EMA_A pins will not function as GPIOs even after muxing them to be GPIO.

We don't seem to be able to use GP1[0], GP[3]:GP1[12] with this muxing, these pins always read zero. GP1[13] and GP1[14], the bank address pins, do work as GPIOs. Or seem to. I can change their values from /sys/class/gpio.

I have looked in several places but can't find any documentation on this issue. Is this expected behavior once any address pin is muxed?

Here is a shot from the Pin Setup utility:

thanks,

Dan


Viewing all articles
Browse latest Browse all 17527

Trending Articles



<script src="https://jsc.adskeeper.com/r/s/rssing.com.1596347.js" async> </script>