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HW Memory Design Question for C6748 Based off the LCDK

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I am still very new to the C6748 DSP I am very confused by the memory section of the schematic that is supplied by the development kit.  (OMAP-L138_C6748 LC Dev Kit Ver A6a).  From the processor documentation I understand there are two standard memory interfaces (EMIFA, EMIFB) available to the processor for various different purposes.  Where I start to get confused is that the block diagram has the "DDR-II" memory hooked up to a DDR bus.  I then scroll down to the scematic itself and I find all the pins named as "DDR_A_13" and such.  I can't find any reference to this pin description in the C6748 documentation and thus am condused.  Is this really the EMIFB bus or is there an additional DDR bus?  I can't find any additional rerfernce to a DDR bus so I am assuming it is the EMIFB bus.  


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