Hi All,
I am new to this TI L138. Hope someone will able to assist me in the query below:
I read from the datasheet (SPRS586H) that there are "Three 64-bit General-Purpose Timers (Each Configurable as Two 32-Bit Timers) on page 2. Is all the timer stated usable/meant for the ARM side?
From OMAPL138_StarterWare_1_10_04_01, i manage to locate the base address as follow:
#define SOC_TMR_0_REGS (0x01C20000)
#define SOC_TMR_1_REGS (0x01C21000)
#define SOC_TMR_2_REGS (0x01F0C000)
#define SOC_TMR_3_REGS (0x01F0D000)
Is the above correct? Should i have 3 or 4 64-bit timer?
Also, i don't seem to be able to locate the above addresses in the Omap-L138 DSP+ARM Processor Technical Reference Manual (spruh77a). Which document will shows the memory-map register and its corresponding bit-field setting function?
Thanks.
Regards,
Tom