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iwr1642 help with parseTLV.py

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Hi John,

In mss main.c -> Line 407, I added NULL that was cleared my error..

Now I am in a next issue which I couldn't able to run my parserTLV.py..

Am attaching the parser code which is taken from forum:

#!/usr/bin/python
# -*- coding: utf-8 -*-
import struct
import sys
import math


#
# TODO 1: Find the first occurrence of magic and start from there
# TODO 2: Warn if we cannot parse a specific section and try to recover
# TODO 3: Remove error at end of file if we have only fragment of TLV
#

def tlvHeaderDecode(data):
    (tlvType, tlvLength) = struct.unpack('2I', data)
    return (tlvType, tlvLength)


def parseDetectedObjects(data, tlvLength):
    (numDetectedObj, xyzQFormat) = struct.unpack('2H', data[:4])
    print('\tDetect Obj:\t%d ' % (numDetectedObj))
    for i in range(numDetectedObj):
      print('\tObjId:\t%d ' % i)
      (
      rangeIdx,
      dopplerIdx,
      peakVal,
      x,
      y,
      z,
      ) = struct.unpack('3H3h', data[4 + 12 * i:4 + 12 * i + 12])
    print ('\t\tDopplerIdx:\t%d ' % dopplerIdx)
    print ('\t\tRangeIdx:\t%d ' % rangeIdx)
    print ('\t\tPeakVal:\t%d ' % peakVal)
    print ('\t\tX:\t\t%07.3f ' % (x * 1.0 / (1 << xyzQFormat)))
    print ('\t\tY:\t\t%07.3f ' % (y * 1.0 / (1 << xyzQFormat)))
    print ('\t\tZ:\t\t%07.3f ' % (z * 1.0 / (1 << xyzQFormat)))
    print ('\t\tRange:\t\t%07.3fm' % math.sqrt(pow(x * 1.0 / (1
            << xyzQFormat), 2) + pow(y * 1.0 / (1 << xyzQFormat),
                2)))


def parseRangeProfile(data, tlvLength):
    for i in range(256):
      rangeProfile = struct.unpack('H', data[2 * i:2 * i + 2])
    print ('\tRangeProf[%d]:\t%07.3f ' % (i, rangeProfile[0] * 1.0
        * 6 / 8 / (1 << 8)))
    print ('\tTLVType:\t%d ' % 2)


def parseStats(data, tlvLength):
    (
    interProcess,
    transmitOut,
    frameMargin,
    chirpMargin,
    activeCPULoad,
    interCPULoad,
    ) = struct.unpack('6I', data[:24])
    print ('\tOutputMsgStats:\t%d ' % 6)
    print ('\t\tChirpMargin:\t%d ' % chirpMargin)
    print ('\t\tFrameMargin:\t%d ' % frameMargin)
    print ('\t\tInterCPULoad:\t%d ' % interCPULoad)
    print ('\t\tActiveCPULoad:\t%d ' % activeCPULoad)
    print ('\t\tTransmitOut:\t%d ' % transmitOut)
    print ('\t\tInterprocess:\t%d ' % interProcess)


def tlvHeader(data):
    while data:
        headerLength = 36
        try:
            (
            magic,
            version,
            length,
            platform,
            frameNum,
            cpuCycles,
            numObj,
            numTLVs,
            ) = struct.unpack('Q7I', data[:headerLength])
        except:
            print ('Improper TLV structure found: ', (data, ))
            break
        print ('packet ID:\t%d ' % frameNum)
        print ('Version:\t%x ' % version)
        print ('TLV:\t\t%d ' % numTLVs)
        print ('Detect Obj:\t%d ' % numObj)
        print ('Platform:\t%X ' % platform)


    if version > 0x01000005:
        subFrameNum = struct.unpack('I', data[36:40])[0]
        headerLength = 40
        print ('Subframe:\t%d ' % subFrameNum)
        pendingBytes = length - headerLength
        data = data[headerLength:]
        for i in range(numTLVs):
            (tlvType, tlvLength) = tlvHeaderDecode(data[:8])
            data = data[8:]
        if tlvType == 1:
            parseDetectedObjects(data, tlvLength)
        elif tlvType == 2:
            parseRangeProfile(data, tlvLength)
        elif tlvType == 6:
            parseStats(data, tlvLength)
        else:
            print ('Unidentified tlv type %d' % tlvType)
            data = data[tlvLength:]
            pendingBytes -= 8 + tlvLength
            data = data[pendingBytes:]
    yield (length, frameNum)

if __name__ == '__main__':
    if len(sys.argv) != 2:
        print ('Usage: parseTLV.py inputFile.bin')
        sys.exit()

fileName = sys.argv[1]
rawDataFile = open(fileName, 'rb')
rawData = rawDataFile.read()
rawDataFile.close()
magic = b'\x02\x01\x04\x03\x06\x05\x08\x07'
offset = rawData.find(magic)
rawData = rawData[offset:]
for length, frameNum in tlvHeader(rawData):
    print

And the errors which it is showing is:

$ python parseTLV.py inputFile.bin
Improper TLV structure found:  (b'\n',)
Traceback (most recent call last):
  File "parseTLV.py", line 127, in <module>
    for length, frameNum in tlvHeader(rawData):
  File "parseTLV.py", line 93, in tlvHeader
    if version > 0x01000005:
UnboundLocalError: local variable 'version' referenced before assignment

 Please help me to resolve this issue 


PROCESSOR-SDK-AM57X: Qt screenshot

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Part Number: PROCESSOR-SDK-AM57X

Hello:

We are using AM5728 with processor SDK 05.02.00.10, and running on Qt5 application with weston/wayland.

We confirmed that the screenshot of the app can be taken with MOD + S.

But we want to take that without Keypress. (e.g, API call from Qt app)

Is it possible? How can I do this?

Thanks,

AM3358: CPSW demo options

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Part Number: AM3358

Hi. there


processors.wiki.ti.com/.../SK_ETH
According to the above URL, there are three modes in AM335x Starter Kit.

The three modes include switch mode, dual MAC mode, and gateway mode.

By default, the Starter kit’s Ethernet ports are automatically configured in dual-mac mode.

I can choose from ethernet submenu like this:
eth1 enable : dual-mac mode
ethe1_eth0 nat : gateway mode

Q1. How can I activate switch mode?

Q2. Is there a way to change the mode in the console?

Q3. How can I check if the switch mode is working properly?


Thank you in advance.

CCS/TDA2EVM5777: CCS/TDA2EVM5777: Building the Test Application Executable through gmake

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Part Number: TDA2EVM5777

Tool/software: Code Composer Studio

Hello everyone 

I am following "TI Deep learning Library on TDAx User Guide" to build the Test Application Executable through GMAKE

in 

3.3.4 Building the Test Application Executable through GMAKE

In the 4th step Build the sample test application project

a. For DSP
modules\ti_dl\test> gmake CORE=dsp all
b. For EVE
modules\ti_dl\test> gmake CORE=eve all

when I cmd: gmake CORE=dsp all

i got message as below:

C:\PROCESSOR_SDK_VISION_03_07_00_00\ti_components\algorithms\REL.TIDL.01.01.03.00\modules\ti_dl\test>gmake CORE=dsp all
compiling .\.\src\report_utils.c
compiling .\.\src\tidl_config.c
compiling .\.\src\tidl_image_preproc.c
compiling .\.\src\tidl_tb.c
".\.\src\tidl_tb.c", line 376: warning: multicharacter character literal (potential portability problem)
".\.\src\tidl_tb.c", line 1590: warning: the format string ends before this argument
compiling .\..\..\..\common\configparser.c
compiling .\..\..\..\common\ti_draw_utils.c
compiling .\..\..\..\common\ti_mem_manager.c
compiling .\..\..\..\common\cache.c
compiling .\..\..\..\common\profile.c
error: cannot find file
"/datalocal1/ti_components/algorithms/mathlib_c66x_3_1_0_0/packages/ti/mathl
ib/lib/mathlib.ae66"
error: cannot find file
"D:\PROCESSOR_SDK_VISION_03_04_00_00\ti_components\algorithms\REL.DMAUTILS.0
0.08.00.02\dmautils/libs/dsp/release/dmautils.lib"

undefined first referenced
symbol in file
--------- ----------------
EDMA_UTILS_autoIncrement_configure ../../ti_dl/lib/dsp/release/tidl_algo.lib<plink.out>
EDMA_UTILS_autoIncrement_configure_v2 ../../ti_dl/lib/dsp/release/tidl_algo.lib<plink.out>
EDMA_UTILS_autoIncrement_deconfigure_v2 ../../ti_dl/lib/dsp/release/tidl_algo.lib<plink.out>
EDMA_UTILS_autoIncrement_init ../../ti_dl/lib/dsp/release/tidl_algo.lib<plink.out>
EDMA_UTILS_autoIncrement_init_v2 ../../ti_dl/lib/dsp/release/tidl_algo.lib<plink.out>
EDMA_UTILS_autoIncrement_triggerInChannel ../../ti_dl/lib/dsp/release/tidl_algo.lib<plink.out>
EDMA_UTILS_autoIncrement_triggerInChannel_v2 ../../ti_dl/lib/dsp/release/tidl_algo.lib<plink.out>
EDMA_UTILS_autoIncrement_triggerOutChannel_v2 ../../ti_dl/lib/dsp/release/tidl_algo.lib<plink.out>
EDMA_UTILS_autoIncrement_waitInChannel ../../ti_dl/lib/dsp/release/tidl_algo.lib<plink.out>
EDMA_UTILS_autoIncrement_waitInChannel_v2 ../../ti_dl/lib/dsp/release/tidl_algo.lib<plink.out>
EDMA_UTILS_autoIncrement_waitOutChannel_v2 ../../ti_dl/lib/dsp/release/tidl_algo.lib<plink.out>
EDMA_UTILS_globalReset ../../ti_dl/lib/dsp/release/tidl_algo.lib<plink.out>
EDMA_UTILS_memcpy2D ../../ti_dl/lib/dsp/release/tidl_algo.lib<plink.out>
EDMA_UTILS_scattherGather_init ../../ti_dl/lib/dsp/release/tidl_algo.lib<plink.out>
EDMA_UTILS_scattherGather_updateNtrigger ../../ti_dl/lib/dsp/release/tidl_algo.lib<plink.out>
EDMA_UTILS_scattherGather_wait ../../ti_dl/lib/dsp/release/tidl_algo.lib<plink.out>

error: unresolved symbols remain
error: errors encountered during linking; ".\out\dsp_test_dl_algo.out" not
built
gmake: *** [outfile] Error 1

Please guide 

With regards 

Jawahar

Compiler/PROCESSOR-SDK-AM65X: Devmem DDR access fails

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Part Number: PROCESSOR-SDK-AM65X

Tool/software: TI C/C++ Compiler

 SDK version :06.01.00.08

I am getting following error while accessing DDR ,

devmem2 0x80000000
/dev/mem opened.
Error at line 90, file devmem2.c (1) [Operation not permitted]

what changes are needed in kernel ,any leads appreciated

AM3359: Board initialization customization

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Part Number: AM3359

Hello Community,

Why Board_moduleClockInit() initializing all peripherals like, UART, CPSW, GPIO,  I2C, MCSPI,  EDMA3CC, EDMA3TC0, EDMA3TC1, EDMA3TC2, MMCSD, GPMC, PRU_ICSS, RTCSS ?

Can I choose/removed peripherals like EDMA, I2C etc ?

I am only interested in UART , GPIO and PRUSS ? Customization is possible or not ?

Regards,

Pankaj

AM5726: Eth1 not working on AM572x

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Part Number: AM5726

Hello,
When starting Linux the Ethernet PHY`s are recognized:

[    2.311347] libphy: Fixed MDIO Bus: probed
[    2.381059] davinci_mdio 48485000.mdio: davinci mdio revision 1.6, bus freq 1000000
[    2.388757] libphy: 48485000.mdio: probed
[    2.398182] davinci_mdio 48485000.mdio: phy[0]: device 48485000.mdio:00, driver SMSC LAN8710/LAN8720
[    2.407394] davinci_mdio 48485000.mdio: phy[1]: device 48485000.mdio:01, driver SMSC LAN8710/LAN8720
[    2.417497] cpsw-phy-sel 4a002554.cpsw-phy-sel: invalid resource
[    2.423595] cpsw-phy-sel: probe of 4a002554.cpsw-phy-sel failed with error -22
[    2.431722] cpsw 48484000.ethernet: Detected MACID = 18:62:e4:6f:58:52
[    2.438432] cpsw 48484000.ethernet: initialized cpsw ale version 1.4
[    2.444822] cpsw 48484000.ethernet: ALE Table size 1024
[    2.450173] cpsw 48484000.ethernet: cpts: overflow check period 500 (jiffies)
[    2.459430] cpsw 48484000.ethernet: cpsw: Detected MACID = 18:62:e4:6f:58:53


If I add an Ethernet cable to a switch I get a message at Eth0 and Eth1 that the links are detected.
However, a ping only works for ETH0 and at "wiresharc" I can see that no data comes out of the ETH1 interface. Can you help me with this problem? Probably only something is wrong with the DTS.

The PHY addresses there are 0x00 (eth0) and 0x01 (eth1).

    cpsw_pins_default: cpsw_pins_default {
        pinctrl-single,pins = <
            /* Clock at slave 0/1 */
            DRA7XX_CORE_IOPAD(0x3644, PIN_INPUT_PULLDOWN | MUX_MODE0)    /* u3 rmii_mhz_50_clk.rmii_mhz_50_clk */

            /* Slave at addr 0x0 */
            DRA7XX_CORE_IOPAD(0x3658, PIN_INPUT | MUX_MODE1)    /* v7 rgmii0_txd3.rmii0_crs */
            DRA7XX_CORE_IOPAD(0x365c, PIN_INPUT | MUX_MODE1)    /* u7 rgmii0_txd2.rmii0_rxer */
            DRA7XX_CORE_IOPAD(0x3660, PIN_INPUT | MUX_MODE1)    /* v6 rgmii0_txd1.rmii0_rxd1 */
            DRA7XX_CORE_IOPAD(0x3664, PIN_INPUT | MUX_MODE1)    /* u6 rgmii0_txd0.rmii0_rxd0 */

            DRA7XX_CORE_IOPAD(0x3674, PIN_OUTPUT | MUX_MODE1)    /* v3 rgmii0_rxd2.rmii0_txen */
            DRA7XX_CORE_IOPAD(0x3678, PIN_OUTPUT | MUX_MODE1)    /* y2 rgmii0_rxd1.rmii0_txd1 */
            DRA7XX_CORE_IOPAD(0x367c, PIN_OUTPUT | MUX_MODE1)    /* w2 rgmii0_rxd0.rmii0_txd0 */

            /* Slave at addr 0x1 */
            DRA7XX_CORE_IOPAD(0x3648, PIN_INPUT | MUX_MODE2)    /* v2 uart3_rxd.rmii1_crs */
            DRA7XX_CORE_IOPAD(0x364c, PIN_INPUT | MUX_MODE2)    /* y1 uart3_txd.rmii1_rxer */
            DRA7XX_CORE_IOPAD(0x3650, PIN_INPUT | MUX_MODE2)    /* w9 rgmii0_txc.rmii1_rxd1 */
            DRA7XX_CORE_IOPAD(0x3654, PIN_INPUT | MUX_MODE2)    /* v9 rgmii0_txcl.rmii1_rxd0 */

            DRA7XX_CORE_IOPAD(0x3668, PIN_OUTPUT | MUX_MODE2)    /* u5 rgmii0_rxc.rmii1_txen */
            DRA7XX_CORE_IOPAD(0x366C, PIN_OUTPUT | MUX_MODE2)    /* v5 rgmii0_rxctl.rmii1_txd1 */
            DRA7XX_CORE_IOPAD(0x3670, PIN_OUTPUT | MUX_MODE2)    /* v4 rgmii0_rxd3.rmii1_txd0 */
        >;
    };

    cpsw_pins_sleep: cpsw_pins_sleep {
        pinctrl-single,pins = <
            /* Slave at addr 0x0 */
            DRA7XX_CORE_IOPAD(0x3658, PIN_INPUT | MUX_MODE15)    /* v7 rgmii0_txd3.disabled */
            DRA7XX_CORE_IOPAD(0x365c, PIN_INPUT | MUX_MODE15)    /* u7 rgmii0_txd2.disabled */
            DRA7XX_CORE_IOPAD(0x3660, PIN_INPUT | MUX_MODE15)    /* v6 rgmii0_txd1.disabled */
            DRA7XX_CORE_IOPAD(0x3664, PIN_INPUT | MUX_MODE15)    /* u6 rgmii0_txd0.disabled */

            DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT | MUX_MODE15)    /* v3 rgmii0_rxd2.disabled */
            DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT | MUX_MODE15)    /* y2 rgmii0_rxd1.disabled */
            DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT | MUX_MODE15)    /* w2 rgmii0_rxd0.disabled */

            /* Slave at addr 0x1 */
            DRA7XX_CORE_IOPAD(0x3648, PIN_INPUT | MUX_MODE15)    /* v2 uart3_rxd.disabled */
            DRA7XX_CORE_IOPAD(0x364c, PIN_INPUT | MUX_MODE15)    /* y1 uart3_txd.disabled */
            DRA7XX_CORE_IOPAD(0x3650, PIN_INPUT | MUX_MODE15)    /* w9 rgmii0_txc.disabled */
            DRA7XX_CORE_IOPAD(0x3654, PIN_INPUT | MUX_MODE15)    /* v9 rgmii0_txcl.disabled */

            DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT | MUX_MODE15)    /* u5 rgmii0_rxc.disabled */
            DRA7XX_CORE_IOPAD(0x366C, PIN_INPUT | MUX_MODE15)    /* v5 rgmii0_rxctl.disabled */
            DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT | MUX_MODE15)    /* v4 rgmii0_rxd3.disabled */
        >;
    };

    davinci_mdio_pins_default: davinci_mdio_pins_default {
        pinctrl-single,pins = <
            /* MDIO */
            DRA7XX_CORE_IOPAD(0x363c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* V1 mdio_mclk.mdio_mclk */
            DRA7XX_CORE_IOPAD(0x3640, PIN_INPUT_PULLUP | MUX_MODE0)    /* U4 mdio_d.mdio_d */
        >;
    };

    davinci_mdio_pins_sleep: davinci_mdio_pins_sleep {
        pinctrl-single,pins = <
            DRA7XX_CORE_IOPAD(0x363c, PIN_INPUT | MUX_MODE15) /* V1 mdio_mclk.disabled */
            DRA7XX_CORE_IOPAD(0x3640, PIN_INPUT | MUX_MODE15)    /* U4 mdio_d.disabled */
        >;
    };
};

&mac {
    status = "okay";
    pinctrl-names = "default", "sleep";
    pinctrl-0 = <&cpsw_pins_default>;
    pinctrl-1 = <&cpsw_pins_sleep>;
    rx_descs = <64>; /* Was removed from am33xx.dtsi but is needed by the CPSW driver */
    dual_emac;
};

&cpsw_emac0 {
    phy_id = <&davinci_mdio>, <0>;
    phy-mode = "rmii";
    dual_emac_res_vlan = <0>;
};

&cpsw_emac1 {
    phy_id = <&davinci_mdio>, <1>;
    phy-mode = "rmii";
    dual_emac_res_vlan = <1>;
};

&davinci_mdio {
    pinctrl-names = "default", "sleep";
    pinctrl-0 = <&davinci_mdio_pins_default>;
    pinctrl-1 = <&davinci_mdio_pins_sleep>;
};

&davinci_mdio {
    phy0: ethernet-phy@1 {
        reg = <0>;
        max-speed = <100>;
    };

    phy1: ethernet-phy@2 {
        reg = <1>;
        max-speed = <100>;
    };
};



DRA745: dra74x: How to output JEIDA lvds format?

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Part Number: DRA745

dra74 - rgb ->DS90C189 - dual lvds ->display

The input format of my display is JEDA,but the physical connection is based on VESA.

how to output correct RGB?


Compiler/AM6548: TI SDK supports clause 22, how about clause 45, more exactly the OP Code 1 0 for Read+ADDR

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Part Number: AM6548

Tool/software: TI C/C++ Compiler

Hi ,

I need some help please in trying to understand how should I change the TI SDK clause 22 configuration to clause 45 configuration.

In clause 45 the OP Code has 1 0 for the Read + ADDRS that is missing in clause 22 (TI SDK ) and we need to change that .

LINUXSDK-OMAPL138: u-boot rebuild

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Part Number: LINUXSDK-OMAPL138

Hi

I am trying to build u-boot ais for my custom board which include a Logic Omapl138 SOM.

I used omapl138_lcdk_defconfig and changed boot device to SPI from nand. I resolved many errors since but this made me exhausted:

CC      spl/lib/linux_compat.o
In file included from include/common.h:41,
                 from drivers/mtd/spi/sf_probe.c:10:
drivers/mtd/spi/sf_probe.c: In function ‘spi_flash_std_probe’:
drivers/mtd/spi/sf_probe.c:149:54: error: dereferencing pointer to incomplete type ‘struct dm_spi_slave_platdata’
  debug("%s: slave=%p, cs=%d\n", __func__, slave, plat->cs);
                                                      ^~
include/log.h:156:26: note: in definition of macro ‘debug_cond’
    printf(pr_fmt(fmt), ##args); \
                          ^~~~
drivers/mtd/spi/sf_probe.c:149:2: note: in expansion of macro ‘debug’
  debug("%s: slave=%p, cs=%d\n", __func__, slave, plat->cs);
  ^~~~~

Thanks

TCI6638K2K: UIO driver and userspace app for DSP to ARM interrupt communication.

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Part Number: TCI6638K2K

Hi Everyone,

Is there possible to use uio linux driver to get interrupt which is raised by DSP and intimate Linux userspace application?

I am using processor sdk linux 06_00_01_08, is there any example is available that I can use as a reference.

Regards,

Snehal

OMAP-L138: How can I dump a firmware in NAND FLASH?

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Part Number: OMAP-L138

How can I dump a firmware into the NAND FLASH of a device with OMAP-L138?

I have connected the PC via interface to UART 0.Connection is ok and I have access to the device.

I have the unpacked firmware (Linux and Ramloader in binary) and want to dump it NAND FLASH of the device.

OMAP-L138: How can I dump a firmware file into the NAND FLASH of a device with OMAP-L138

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Part Number: OMAP-L138

I want to dump a firmware into the NAND FLASH of a OMAP-L138 device.How can this be done?

I have the device connected to UART 0 and have access to it.I uploaded a bootloader to test it.

I have the firmware for the device in binary code (linux and bootloader)

66AK2G12: 66AK2G12, TI RTOS

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Part Number: 66AK2G12

Hi

I am using 66AK2G12 in my new board and want to run TI -RTOS for my application.

1st > My question is, Which hardware resources are compulsory required to run TI-RTOS on 66AK2G12 .

2nd > how memory size required for RTOS ?

3rd > which interface should i use to boot and run RTOS on 66AK2G12.? e.g SD card or else

4th > Minimum RAM required to run RTOS ?

thanks

66AK2G12: 66AK2G12, TI RTOS, HARDWARE

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Part Number: 66AK2G12

Hi

I am using 66AK2G12 in my new board and want to run TI -RTOS for my application.

1st > My question is, Which hardware resources are compulsory required to run TI-RTOS on 66AK2G12 .

2nd > how memory size required for RTOS ?

3rd > which interface should i use to boot and run RTOS on 66AK2G12.? e.g SD card or else

4th > Minimum RAM required to run RTOS ?

thanks


AM3358: Why does Timer_create(0, func, ¶ms, &eb) return NULL?

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Part Number: AM3358

Here func is Timer_FuncPtr

Timer_Params params;

/* Setup the timer parameters */

Timer_Params_init(&params);

params.runMode = Timer_RunMode_ONESHOT;

params.startMode = Timer_StartMode_USER;

params.periodType = Timer_PeriodType_MICROSECS;

params.arg = 0;

/* Create the Timer:

* Timer 0 is the watchdog

* Timer 1 is a generic one

* Timer 2 is the system clock

*/

Thanks

AM3358: Why does UART_write not invoke read callback function?

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Part Number: AM3358

if (UART_read(uart, (void *)(uintptr_t)addrScanPrompt, UART_TEST_READ_LEN) == UART_ERROR)

{

goto Err;

}//read is UART_MODE_CALLBACK

if (UART_write(uart, (void *)(uintptr_t)addrEchoPrompt, sizeof(echoPrompt)) == UART_ERROR)

{

goto Err;

}  //write is UART_MODE_BLOCKING

if (UART_osalPendLock(callbackSem, uartParams.readTimeout) != SemaphoreP_OK)//stop here forever

{

goto Err;

}

but

if (UART_read(uart, (void *)(uintptr_t)addrScanPrompt, UART_TEST_READ_LEN) == UART_ERROR)

{

goto Err;

}//read is UART_MODE_CALLBACK

input "this way work!"  from serial port 0

if (UART_osalPendLock(callbackSem, uartParams.readTimeout) != SemaphoreP_OK)//it run pass this line to next line.

{

goto Err;

}

Why? Here uart is uart0. Thanks

TMS320C6748: McASP - FIFO ordering, with multiple line in/out

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Part Number: TMS320C6748

Hello,

I'm part of a C6748, OMAP-L138, design.  It will make use of multiple data in and out pins with a McASP.  The question is how is data structured in the McASP AFIFO, when there is data on multiple pins at the same time.  For example, on the read side, two 32 bits words could arrive on 8 data pins at the same time.  What would the contents of the RFIFO look like in that case?  For example, one scenario would be both words placed from each line, beginning on line 1, then through line 8.

AXR0, word 1

AXR0, word 2

AXR1, word 1

AXR1, word 2

.

.

.

AXR7, word 1

AXR7, word 2

Also, can you tell me what the wait state/delay is reading and writing from the AFIFO's?  Is it the same as read/write from internal memory?

Regards,

Robert

AM5746: Detect garbled data in L1/L2 caches

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Part Number: AM5746

Hi,

My customers are concerned about garbled data in A15 core's L1 and L2 caches.
They hope to detect garbled data, because L1 and L2 caches don't have ECC/parity.

Question 1:
Are there any way to clean L1 instruction cache (like data cache) from user program?

Question 2:
If data cache(instruction cache) is cleaned before dirty, is SDRAM updated with cache data?

Question 3:
Can Core1 L1 cache be handled(clean, invalidate, etc.) by Core0 program? (SMP mode)

AM5746
CCS v8
GCC GNU v6.3.1(Linaro)
SMP mode
pdk_am57xx_1_0_11
bios_6_76_00_08
XDCTools 3.50.3.33

Regards, Rei

SYSBIOS: Only one element can be loaded in the queue

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Part Number: SYSBIOS

Hi,

I am developing on am335x using SYSBIOS "bios_6_35_04_50".

Queue is used in that control.
I confirmed the symptom that seems to be a problem with Queue control.
Only one element can be loaded in the queue.

For example, prepare "queue_A" and "queue_B" with different "Queue_Elem" addresses,
Use "Queue_enqueue" to load "queue_A" and then "queue_B".
If you queue with "Queue_dequeue", I think that the address of "queue_A" will be returned (can be acquired).
However, queue_B is sucked up and then "queue" is in an "empty" state.
In this way, I can confirm the symptom that only one element is loaded in my environment.

Is there something missing?

Thank you for considering my request.

Best regards,
Eiji

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