Part Number: PROCESSOR-SDK-AM335X

Hi,

I am using SKAM335x processor board and TI RTOS on windows host PC. 

If I integrate Seggar Grpahics code with with raster example code, will it work on LCD comes with SKAM335x board?

Thanks

Regards

Gaurav

Part Number: AM5728

Tool/software: Code Composer Studio

I'm using 2 core to run 2 task. Its mean that SMP number of core is 2.

I don't know whether when using the Uart_printf function in each task, the output will be cluttered or not. If so, is there any way to sync this?

For example: Task 1: Uart_printf("111111"); Task 2:Uart_printf("22222");

The output may be: "12121212"?

Part Number: AM3354

Sir/Madam,

We are using AM3354 Sitara processor in our custom design. We will have to build a Linux BSP on it, which can boot and hold all the linux core modules in it.

In the past, we have used Yocto Project to build OS for embedded processors. We have only found meta-variscite layer in the open source.

We have also found the SDK resource (http://variwiki.com/index.php?title=VAR-SOM-AM33_Linux_SDK_7#Install_LSP_packages) but we would like to stick to the Yocto approach as it offers more customisation to the OS built process.

Best,

Abhijeet G

BitMapper

Part Number: AM3352

Hi .

Customer got this kind of Kernel panic issue.

Panic log is as following.

I suspect this is related with System suspend/resume issue?

Plz help.

THanks.

BR Rio

Unable to handle kernel NULL pointer dereference at virtual address 000000d0
[ 6316.730937] pgd = c0004000
[ 6316.733655] [000000d0] *pgd=00000000
[ 6316.737261] Internal error: Oops: 17 [#1] PREEMPT ARM
[ 6316.742333] Modules linked in:
[ 6316.745413] CPU: 0 PID: 0 Comm: swapper Not tainted 4.9.59 #19
[ 6316.751269] Hardware name: Generic AM33XX (Flattened Device Tree)
[ 6316.757388] task: c0e060c0 task.stack: c0e00000
[ 6316.761950] PC is at run_posix_cpu_timers+0x3a4/0x86c
[ 6316.767034] LR is at update_process_times+0x60/0x64
[ 6316.771934] pc : [<c01804dc>] lr : [<c017aa8c>] psr: 60000193
[ 6316.771934] sp : c0e01c48 ip : 00000000 fp : c0e01ccc
[ 6316.783460] r10: c0e14a0c r9 : c018ad5c r8 : 00000000
[ 6316.788706] r7 : 000005be r6 : 00000000 r5 : c0e01c88 r4 : c0e060c0
[ 6316.795258] r3 : 00000000 r2 : 00000000 r1 : 00000000 r0 : 00000000
[ 6316.801816] Flags: nZCv IRQs off FIQs on Mode SVC_32 ISA ARM Segment none
[ 6316.809069] Control: 10c5387d Table: 959e4019 DAC: 00000051
[ 6316.814838] Process swapper (pid: 0, stack limit = 0xc0e00208)
[ 6316.820695] Stack: (0xc0e01c48 to 0xc0e02000)
[ 6316.825075] 1c40: c018a7dc c011a300 ffffffff 00000000 0000a700 00000000
[ 6316.833291] 1c60: c0152fb4 c0e0fea8 c0e060c0 00000000 000005be 00000000 c018ad5c c0e14a0c
[ 6316.841507] 1c80: c0e01c9c 00000000 c0e01c88 c0e01c88 c0e060c0 00000000 000005be 00000000
[ 6316.849723] 1ca0: c018ad5c c0e00000 c0e060c0 00000000 000005be 00000000 c018ad5c c0e14a0c
[ 6316.857939] 1cc0: c0e01cec c0e01cd0 c017aa8c c0180144 c0e15140 c0e01ed0 b9da268a 000005be
[ 6316.866156] 1ce0: c0e01cfc c0e01cf0 c018ad58 c017aa38 c0e01d2c c0e01d00 c018adc0 c018ad14
[ 6316.874373] 1d00: c0e01d2c c0e01d10 b9da268a 000005be c0e149c0 c0e15140 c0e00000 c0e14a00
[ 6316.882589] 1d20: c0e01d7c c0e01d30 c017b7f4 c018ad68 c0bcb9fc ffffe000 b9da2101 000005be
[ 6316.890806] 1d40: c0e4e156 00000001 b9da2101 000005be 3b9aca00 c0e149c0 c0e00000 00000003
[ 6316.899022] 1d60: 7fffffff ffffffff c0e01d80 c0e14a78 c0e01dd4 c0e01d80 c017bab4 c017b6b0
[ 6316.907238] 1d80: c0e14a78 0002625a c0000000 00a94701 00013880 ffffe000 b9da2101 000005be
[ 6316.915454] 1da0: b9da2101 000005be a6aaaaab c0e081f4 df01a000 00000000 c0e01e34 00000010
[ 6316.923669] 1dc0: df01a000 c0e4e12e c0e01de4 c0e01dd8 c0119f58 c017ba0c c0e01e2c c0e01de8
[ 6316.931887] 1de0: c016900c c0119f34 c0e76cf8 00989680 00000000 c0bca9f4 c0bca9e0 c0bca9b8
[ 6316.940102] 1e00: 00000000 df01a000 df01a000 00000000 00000000 df006000 c0e00000 00000000
[ 6316.948318] 1e20: c0e01e4c c0e01e30 c01690c0 c0168f64 c016e390 00000000 df01a000 df01a010
[ 6316.956534] 1e40: c0e01e64 c0e01e50 c0169160 c01690a8 df01a000 df01a010 c0e01e7c c0e01e68
[ 6316.964750] 1e60: c016c2b8 c0169108 c0e1d180 00000010 c0e01e8c c0e01e80 c0168208 c016c20c
[ 6316.972966] 1e80: c0e01eb4 c0e01e90 c01688b0 c01681e8 c0e8d000 20000013 ffffffff c0e01f04
[ 6316.981183] 1ea0: 00448ef2 c0e00000 c0e01ecc c0e01eb8 c0101484 c0168860 c06ac8a8 20000013
[ 6316.989398] 1ec0: c0e01f54 c0e01ed0 c010c5cc c0101454 00000000 000005be 64850811 c0e0fea8
[ 6316.997614] 1ee0: b9b07898 000005be 00000000 d757a600 00448ef2 000005be 00000000 c0e01f54
[ 6317.005830] 1f00: c0e01f20 c0e01f20 c06ac8a0 c06ac8a8 20000013 ffffffff 00000051 00000000
[ 6317.014045] 1f20: 00000000 00000000 00450202 d757a600 c0e00000 c0e42268 c0e028c8 c0e41e28
[ 6317.022261] 1f40: c0e028d0 c0e4e12b c0e01f64 c0e01f58 c06aca20 c06ac728 c0e01f74 c0e01f68
[ 6317.030479] 1f60: c0159ba8 c06aca10 c0e01f94 c0e01f78 c0159dd0 c0159b8c c0938878 c0bc8f84
[ 6317.038696] 1f80: 00000002 c0e02840 c0e01fac c0e01f98 c0937538 c0159cf4 c0e4f34c 00000000
[ 6317.046912] 1fa0: c0e01ff4 c0e01fb0 c0d00d44 c09374b8 ffffffff ffffffff 00000000 c0d00704
[ 6317.055129] 1fc0: 00000000 c0d3ca28 00000000 c0e4f4d4 c0e0285c c0d3ca24 c0e0740c 80004059
[ 6317.063344] 1fe0: 413fc082 00000000 00000000 c0e01ff8 80008078 c0d009a8 00000000 00000000
[ 6317.071552] Backtrace:
[ 6317.074023] [<c0180138>] (run_posix_cpu_timers) from [<c017aa8c>] (update_process_times+0x60/0x64)
[ 6317.083026] r10:c0e14a0c r9:c018ad5c r8:00000000 r7:000005be r6:00000000 r5:c0e060c0
[ 6317.090887] r4:c0e00000
[ 6317.093447] [<c017aa2c>] (update_process_times) from [<c018ad58>] (tick_sched_handle+0x50/0x54)
[ 6317.102184] r7:000005be r6:b9da268a r5:c0e01ed0 r4:c0e15140
[ 6317.107872] [<c018ad08>] (tick_sched_handle) from [<c018adc0>] (tick_sched_timer+0x64/0xb8)
[ 6317.116267] [<c018ad5c>] (tick_sched_timer) from [<c017b7f4>] (__hrtimer_run_queues.constprop.4+0x150/0x1e0)
[ 6317.126137] r7:c0e14a00 r6:c0e00000 r5:c0e15140 r4:c0e149c0
[ 6317.131827] [<c017b6a4>] (__hrtimer_run_queues.constprop.4) from [<c017bab4>] (hrtimer_interrupt+0xb4/0x254)
[ 6317.141699] r10:c0e14a78 r9:c0e01d80 r8:ffffffff r7:7fffffff r6:00000003 r5:c0e00000
[ 6317.149560] r4:c0e149c0
[ 6317.152119] [<c017ba00>] (hrtimer_interrupt) from [<c0119f58>] (omap2_gp_timer_interrupt+0x30/0x38)
[ 6317.161207] r10:c0e4e12e r9:df01a000 r8:00000010 r7:c0e01e34 r6:00000000 r5:df01a000
[ 6317.169067] r4:c0e081f4
[ 6317.171629] [<c0119f28>] (omap2_gp_timer_interrupt) from [<c016900c>] (__handle_irq_event_percpu+0xb4/0x144)
[ 6317.181504] [<c0168f58>] (__handle_irq_event_percpu) from [<c01690c0>] (handle_irq_event_percpu+0x24/0x60)
[ 6317.191203] r10:00000000 r9:c0e00000 r8:df006000 r7:00000000 r6:00000000 r5:df01a000
[ 6317.199064] r4:df01a000
[ 6317.201613] [<c016909c>] (handle_irq_event_percpu) from [<c0169160>] (handle_irq_event+0x64/0x90)
[ 6317.210521] r5:df01a010 r4:df01a000
[ 6317.214118] [<c01690fc>] (handle_irq_event) from [<c016c2b8>] (handle_level_irq+0xb8/0x164)
[ 6317.222504] r5:df01a010 r4:df01a000
[ 6317.226098] [<c016c200>] (handle_level_irq) from [<c0168208>] (generic_handle_irq+0x2c/0x3c)
[ 6317.234571] r5:00000010 r4:c0e1d180
[ 6317.238166] [<c01681dc>] (generic_handle_irq) from [<c01688b0>] (__handle_domain_irq+0x5c/0xb0)
[ 6317.246908] [<c0168854>] (__handle_domain_irq) from [<c0101484>] (omap_intc_handle_irq+0x3c/0x98)
[ 6317.255822] r9:c0e00000 r8:00448ef2 r7:c0e01f04 r6:ffffffff r5:20000013 r4:c0e8d000
[ 6317.263602] [<c0101448>] (omap_intc_handle_irq) from [<c010c5cc>] (__irq_svc+0x6c/0xa8)
[ 6317.271637] Exception stack(0xc0e01ed0 to 0xc0e01f18)
[ 6317.276711] 1ec0: 00000000 000005be 64850811 c0e0fea8
[ 6317.284927] 1ee0: b9b07898 000005be 00000000 d757a600 00448ef2 000005be 00000000 c0e01f54
[ 6317.293141] 1f00: c0e01f20 c0e01f20 c06ac8a0 c06ac8a8 20000013 ffffffff
[ 6317.299782] r5:20000013 r4:c06ac8a8
[ 6317.303379] [<c06ac71c>] (cpuidle_enter_state) from [<c06aca20>] (cpuidle_enter+0x1c/0x20)
[ 6317.311682] r10:c0e4e12b r9:c0e028d0 r8:c0e41e28 r7:c0e028c8 r6:c0e42268 r5:c0e00000
[ 6317.319542] r4:d757a600
[ 6317.322102] [<c06aca04>] (cpuidle_enter) from [<c0159ba8>] (call_cpuidle+0x28/0x40)
[ 6317.329798] [<c0159b80>] (call_cpuidle) from [<c0159dd0>] (cpu_startup_entry+0xe8/0x198)
[ 6317.337930] [<c0159ce8>] (cpu_startup_entry) from [<c0937538>] (rest_init+0x8c/0x90)
[ 6317.345704] r7:c0e02840
[ 6317.348259] [<c09374ac>] (rest_init) from [<c0d00d44>] (start_kernel+0x3a8/0x3b4)
[ 6317.355773] r5:00000000 r4:c0e4f34c
[ 6317.359369] [<c0d0099c>] (start_kernel) from [<80008078>] (0x80008078)
[ 6317.365929] Code: e1c200d8 e1902001 1affff28 e594c340 (e5dc30d0)
[ 6317.372057] ---[ end trace 8deb1dada6bea96a ]---
[ 6317.376694] Kernel panic - not syncing: Fatal exception in interrupt
[ 6317.383076] ---[ end Kernel panic - not syncing: Fatal exception in interrupt

Part Number: TDA2PXEVM

Hello TI-san,

I am trying to make a Linux fast boot disk for VisionSDK3.7.1.

Section 3.4 of Linux UserGuide includes the following:

For TDA2PX, copy vision_sdk/apps/tools/Lens_params/LENS_imi.BIN,

vision_sdk/apps/tools/surround_vision_tools/Srv_LUTs/TDA2X/CALMAT.bin and

vision_sdk/apps/tools/surround_vision_tools/Srv_LUTs/TDA2X/ CHARTPOS_RUBICON.BIN to SD Card.

Please tell me which directory on the SD card should I copy these data.

Best regards,

Yudai ISHIBASHI

Part Number: TMS320DM8168

Hi,

I am new for TI DM8168 processor, I am using custom board with DM8168 processor.

I want to interface PCM3168A audio codec with processor McASP0.

What software changes i need to do? so that my audio codec will be interface correctly and it will work.

BR

Vector P

Part Number: TDA2EVM5777

hi,

when i am genertaing the priv.c and priv.h at that time i am getting some technical issue

Part Number: PROCESSOR-SDK-AM335X

Hi,

I am using SKAM335x processor board and TI RTOS on windows host PC.

I want to create a delay through timer. How can I do it? Please elaborate.

Thanks

Gaurav

Part Number: TDA3XEVM

Hi,

Im trying to use FC to init resources for MPEG4 codecs like in test app:

/*Added for using ECPY */
var DSKT2 = xdc.useModule('ti.sdo.fc.dskt2.DSKT2');
xdc.useModule('ti.sysbios.xdcruntime.Settings');

/* Configure heap for FC use */
var internalMemorySegment;  /* Variable to identify internal memory section*/
var intHeapSize = 8192;   /* Size to make internal heap */
internalMemorySegment = "L2SRAM"; 
Program.sectMap[".INTMEM_HEAP"] = internalMemorySegment;

var HeapMem = xdc.useModule('ti.sysbios.heaps.HeapMem');
var heapMemParams = new HeapMem.Params();
heapMemParams.size = intHeapSize;
heapMemParams.sectionName = ".INTMEM_HEAP";
Program.global.INTMEM_HEAP = HeapMem.create(heapMemParams);

/* Configure DSKT2 heaps and scratch */
DSKT2.ALLOW_EXTERNAL_SCRATCH = false;

DSKT2.DARAM0 = "INTMEM_HEAP";
DSKT2.DARAM1 = "INTMEM_HEAP";
DSKT2.DARAM2 = "INTMEM_HEAP";

DSKT2.SARAM0 = "INTMEM_HEAP";
DSKT2.SARAM1 = "INTMEM_HEAP";
DSKT2.SARAM2 = "INTMEM_HEAP";

DSKT2.ESDATA = "INTMEM_HEAP";
DSKT2.IPROG  = "INTMEM_HEAP";
DSKT2.EPROG  = "INTMEM_HEAP";

DSKT2.DSKT2_HEAP = "INTMEM_HEAP";

that I copyed in my cfg file. But DSKT2 libs dont linked automatically and I have to add

-lC:\PROCESSOR_SDK_VISION_03_07_00_00\ti_components\codecs\framework_components_3_40_02_07\packages\ti\sdo\fc\dskt2\lib\release\dskt2.ae66

option. Is it Ok?

Part Number: AM5708

Dear Team,

our customer uses the AM5708BCBDJEAS. It is cooled with a gap filler and a heat sink.

Do you have any spec of the maximum force which is allowed to be applied on the top of the CPU?

Thanks and best regards
Martin

Part Number: TMS320C6657

Hello,

C66x has SIMD capability so that it can carry out 8 float MAC operation per instruction.

However, it has only two 64bit data bus from L1 data memory.

Therefore, if the dot product of two arrays is done, only two MAC operation will be used due to lack of loading data to registers, which is the same performance as C674x.

If so, I think that  the 8 MAC capability using C66x' SIMD is not so useful in many arithmetic cases in general.

Am I right?

Part Number: AM6546

Tool/software: TI C/C++ Compiler

SDK version :06.01.00.08

I am following http://software-dl.ti.com/processor-sdk-linux/esd/docs/latest/linux/Foundational_Components_IPC.html#ipc-for-am65xx to build RTOS IPC  examples from LInux SDK It is failing with following error,   

>>make ti-ipc-linux-examples

.

.

arch64-linux/ -o bin/debug/obj/main_host.ov7A main_host.c
App.c:43:10: fatal error: ti/ipc/Std.h: No such file or directory
#include <ti/ipc/Std.h>
^~~~~~~~~~~~~~

while searched in directory file is present into following directory

./install_rtos/ipc_3_50_04_07/linux/include/ti/ipc/Std.h
./install_rtos/ipc_3_50_04_07/qnx/src/ipc3x_dev/ti/syslink/Std.h
./install_rtos/ipc_3_50_04_07/qnx/include/ti/ipc/Std.h

anyone can please guide on this?

Part Number: TMS320DM8148

Hi,

    I'm currently working on a TMS320DM8148, in this i'm able to understand the video processing and audio processing, but i'm unable to understand or find, how to merge or sync the video and audio file.

(Note : video file is PAL and audio file is PCM). 

Kindly help me with this issue.

Thank you!

Hi,

Looking for the microcontroller from TI which is similar to mimxrt1050 from NXP. Please find my requirements below and do suggest the best one.

Part Number: DRA72XEVM

Hello,
I want to use I2C and SPI communication in my DRA7xEVM Jacinto 6 ES1.0 board.
Looking at the schematics, I am unable to see any pin header that exposes SPI or I2C interfaces.
Is there something I am missing?

Any guidance is greately appreciated.

Hi,

Using yocto linux Am335x-processor-sdk version, kernel version 4.14 & tilcdc drivers.

I am suspecting lcd data lines cause gradient issues so we need to reduce display power, because we ported WinCE in same board, it doesn't seems to show a gradient issues. We ported Linux image, it clearly show gradient with some other features enabled in display port. 

We need to reduce display power in board so need a help from use low power memory as a framebuffer. We tried all steps to clear gradient issues so i need to try this step is possible or not ?

Regards,

SanthanaKumarS

Part Number: AM5708

Tool/software: Code Composer Studio

Hi,

I use GPMC module of AM5708 with Nor-flash MT28EW01 in simple non-multiplexed mode. In single read mode GPMC module works fine.

Configuration of GPMC in this case:

0x00001010, // GPMC_CONFIG1_i (sets signal control parameters)
0x001E1E80, // GPMC_CONFIG2_i (CS signal timing parameter configuration)
0x00000000, // GPMC_CONFIG3_i (nADV signal timing parameter configuration)
0x0F071A80, // GPMC_CONFIG4_i (nWE and nOE signals timing parameter configuration)
0x030D1F1F, // GPMC_CONFIG5_i (RdAccessTime and CycleTime timing parameters configuration)
0x8F070000, // GPMC_CONFIG6_i (WrAccessTime, WrDataOnADmuxBus, Cycle2Cycle and BusTurnAround parameters configuration)
0x00000840, // GPMC_CONFIG7_i (CS address mapping configuration)

..........................................................

volatile __int64_t *BASE_ADDR_64 = FLASH_BASE_ADDRESS;

for(dwCnt = 0;dwCnt < (dwDeviceSize / 4);dwCnt++)
{
n64TmpBuf = BASE_ADDR_64[dwCnt];

UARTConfigPutc(DEBUG_UART_BASE, n64TmpBuf);
UARTConfigPutc(DEBUG_UART_BASE, n64TmpBuf >> 8);
UARTConfigPutc(DEBUG_UART_BASE, n64TmpBuf >> 16);
UARTConfigPutc(DEBUG_UART_BASE, n64TmpBuf >> 24);
UARTConfigPutc(DEBUG_UART_BASE, n64TmpBuf >> 32);
UARTConfigPutc(DEBUG_UART_BASE, n64TmpBuf >> 40);
UARTConfigPutc(DEBUG_UART_BASE, n64TmpBuf >> 48);
UARTConfigPutc(DEBUG_UART_BASE, n64TmpBuf >> 56);
}

Below you can see the result of the code snippet shown above:

On the oscillogram we can see four separated read cycles through 16-bit data bus.

In mode READMULTIPLE the same code snippet give the following result on bus:

In this case we setup GPMC as follow:
0x40001010, // GPMC_CONFIG1_i (sets signal control parameters) x2 latencies
0x001E1E80, // GPMC_CONFIG2_i (CS signal timing parameter configuration)
0x00000000, // GPMC_CONFIG3_i (nADV signal timing parameter configuration)
0x0F071A80, // GPMC_CONFIG4_i (nWE and nOE signals timing parameter configuration)
0x030D1F1F, // GPMC_CONFIG5_i (RdAccessTime and CycleTime timing parameters configuration)
0x8F070000, // GPMC_CONFIG6_i (WrAccessTime, WrDataOnADmuxBus, Cycle2Cycle and BusTurnAround parameters configuration)
0x00000840, // GPMC_CONFIG7_i (CS address mapping configuration)

On last picture we see that the address line a1 is not incrementing though the data read correctly but more slowly than single read.

How can I read entire 4-words page? Maybe setup of GPMC is wrong or incomplete?

Possibly we need point to compiler additional directives before read operation?

Regards, Andrei

Part Number: BEAGLEBOARD-X15

Hi,

I am Processor SDK Linux for AM57x on Beagleboard-x15. Currently, working on Ubuntu is suggested and supported. I would like to give support to other distros and I would like to ask which is the best way to do that.

Kind Regards,

Mustafa

Part Number: TMDSICE3359

Tool/software: Code Composer Studio

Hi

I was testing the TMDSICE3359 with Ethernet/IP with a robustness tool and ran into a problem with PBM_allocation. After establishing and releasing 17 TCP connections to port 44818 simultaneously it's not possible to receive any packets. The PBM_allocation in NIMU_ICSS_rxPacket() fails and memory_squeeze_error is incremented all the time.

I'm glad for any help I can get

Regards

Stephan

Part Number: TMS320C6745

Tool/software: Code Composer Studio

I have generated .hex file using CCS v9 TI tagged hex file output format. I tried to burn .hex file using FlashBurn 4.6 ( http://classic.softwaredesignsolutions.com/flashburn4.aspx) to program TI TMS320C6745 DSP. But I'm unable to downloadFBTC file which is useful to program the flash. Can anyone help me how to program the FLASH?