Part Number: PROCESSOR-SDK-AM335X

Tool/software: TI-RTOS

Hi.,

i have a interrupt issue. i took example code in AM335X_StarterWare_02_00_01_01 this sdk code.(Please visit the site to view this file), it is not entering to the isr function..i am not getting what is issue please any one help me.

i uploaded example program please check.

Regards 

chandana 

Part Number: PRU-ICSS-INDUSTRIAL-SW

Tool/software: TI-RTOS

Hello,

I would like you to confirm about below.

* I am trying to build PRU-ICSS-ethercat-slave 01.00.07.02.
At first, I performed "bat" file to create CCS project. There is no error.
After that, I import this project to CCS(version 9.1) and build this project.
Then, I observed following error.

Error : c:/ti/ccs910/ccs/tools/compiler/gcc-arm-none-eabi-6-2017-q1-update/bin/../lib/gcc/arm-none-eabi/6.3.1/../../../../arm-none-eabi/bin/ld.exe : region `SRAM_HI1' overflowed by xxxx bytes

So, I confirmed following file to check memory map.
"amic11x_onchip_mem_app.xdt"

To increase region of ".text" section, I changed length of "SRAM_HI1".(decrease region of ".bss".)
After that, region error of "SRAM_HI1" disappeared but region error of "SRAM_HI0" appeared.
So, I doubt that this project can be closed only internal memory.
Can you build without any error by using default memory map setting ?

Best Regards,

Part Number: AM3352

Tool/software: Linux

We are using kernel version 4.14.40 (ti processor sdk am335x-05.00.00.15) on our custom AM335x board.Now there is a random musb problem and It cannot be artificially reproduced.

Following is what we are observing:

[ 2140.701953] Internal error: Oops - undefined instruction: 0 [#1] PREEMPT ARM
[ 2140.701959] Modules linked in: 8821cu algif_hash algif_skcipher af_alg rtk_btusb ipt_MASQUERADE nf_nat_masquerade_ipv4 iptable_nat nf_conntrack_ipv4 nf_defrag_ipv4 nf_nat_ipv4 nf_nat nf_conntrack libcrc32c ip_tables x_tables bluetooth musb_dsps musb_hdrc udc_core phy_am335x phy_generic phy_am335x_control cfg80211 pm33xx wkup_m3_ipc wkup_m3_rproc remoteproc omap_aes_driver crypto_engine omap_crypto omap_sham ti_emif_sram pruss_soc_bus rtc_omap musb_am335x omap_wdt sch_fq_codel pps_ldisc pps_ktimer pps_gpio cryptodev(O) [last unloaded: 8821cu]
[ 2140.702039] CPU: 0 PID: 8 Comm: ktimersoftd/0 Tainted: G           O    4.14.40-necro_1_0-g22a6273 NIIC
[ 2140.702042] Hardware name: Generic AM33XX (Flattened Device Tree)
[ 2140.702048] task: ee857100 task.stack: ee86e000
[ 2140.702143] PC is at cppi41_dma_channel_program+0x290/0x294 [musb_hdrc]
[ 2140.702168] LR is at musb_tx_dma_program+0x84/0xec [musb_hdrc]
[ 2140.702173] pc : [<bf408230>]    lr : [<bf3fee5c>]    psr: 600b0013
[ 2140.702176] sp : ee86fc10  ip : ee86fc60  fp : ee86fc5c
[ 2140.702179] r10: ed1f84f0  r9 : ad2b8000  r8 : edd36048
[ 2140.702182] r7 : 00000200  r6 : 0000008a  r5 : edd36048  r4 : edd36048
[ 2140.702186] r3 : 00000000  r2 : 00000000  r1 : 00000002  r0 : edd36048
[ 2140.702192] Flags: nZCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment none
[ 2140.702197] Control: 10c5387d  Table: adb9c019  DAC: 00000051
[ 2140.702201] Process ktimersoftd/0 (pid: 8, stack limit = 0xee86e208)
[ 2140.702205] Stack: (0xee86fc10 to 0xee870000)
[ 2140.702212] fc00:                                     ed1f7100 c0d12b60 00000000 eeee3800
[ 2140.702220] fc20: ee86fc84 ee86fc30 c0843620 c014aa00 ee86fc54 bf407fa0 ed1f84f0 edb25a00
[ 2140.702229] fc40: 00000000 edd36048 00000200 ed1f84f0 ee86fc8c ee86fc60 bf3fee5c bf407fac
[ 2140.702237] fc60: 0000008a ed1f8010 ed1f8010 ed07e600 ed07e600 0000008a ed2af180 bf40c484
[ 2140.702244] fc80: ee86fd24 ee86fc90 bf3ff2bc bf3fede4 00000000 0000008a 00000004 00000008
[ 2140.702252] fca0: bf40a104 00000000 00000000 0000008a ed2afe00 00000000 f10b7c00 00000000
[ 2140.702261] fcc0: edd36048 0000ffff f10b7c00 00000000 00000200 edb25a00 ed2b8000 f10b7c10
[ 2140.702269] fce0: 0000008a f10b7c00 ed1f9010 bf40c48c ed1f84f0 00000002 ee86fd24 ed07e600
[ 2140.702277] fd00: ed2afe00 ed1f8010 00000000 ed1f84f0 ed1f84f0 00000000 ee86fd64 ee86fd28
[ 2140.702284] fd20: bf3ffdd8 bf3feed0 ed2af180 00002000 00000000 00000001 ed1f8010 ed07e600
[ 2140.702293] fd40: 00002000 00000c76 edd36048 ed1f8010 ed2afe14 00000000 ee86fde4 ee86fd68
[ 2140.702301] fd60: bf401768 bf3ffc5c bf40a41c bf1c8384 ffffeffe 000001c0 ed1f8330 fffffbfe
[ 2140.702309] fd80: bf40c48c bf40c480 f10b7c00 00000000 00000002 bf40a4f0 bf40c484 ed1f84f0
[ 2140.702317] fda0: 00000003 ed2afe00 00000000 00000c76 f10b7c10 00000000 00000000 edd36048
[ 2140.702325] fdc0: ed1f84f0 edd36048 ed1f8010 edb25a28 f10b7c10 200b0013 ee86fdf4 ee86fde8
[ 2140.702334] fde0: bf3fbfa0 bf401410 ee86fe44 ee86fdf8 bf4077ec bf3fbf58 ee86fe44 ee86fe08
[ 2140.702342] fe00: ee86fe44 ee86fe10 6afffd71 000001f2 ee86fe2c ee86fe20 bf3fa064 edd36084
[ 2140.702350] fe20: edb25a1c edd36048 edb25a58 edb25a28 ed1f8010 200b0013 ee86fe74 ee86fe48
[ 2140.702358] fe40: bf407b28 bf407658 ee86fe74 ee86fe58 c0d198f8 edb25a28 6affe7f5 000001f2
[ 2140.702366] fe60: ee86e000 00000000 ee86fecc ee86fe78 c017dd5c bf407aa8 ffffe000 c0aaa7ec
[ 2140.702374] fe80: 6affe7f5 000001f2 c0d19800 ee86fe9c c0d551d0 c0d198a0 5f6bf951 00000060
[ 2140.702382] fea0: 00000000 00000000 00000000 5fe24aaf 15b223bf c0d19800 200b0013 00000008
[ 2140.702390] fec0: ee86fef4 ee86fed0 c017df70 c017dbf4 ee86e000 00000020 c0d10628 00000100
[ 2140.702398] fee0: 04208140 00000000 ee86ff34 ee86fef8 c012b9bc c017df04 6bc4f064 000001f2
[ 2140.702406] ff00: 00000100 c0d56000 00000002 ffffe000 ee81e640 00000001 c0d105f4 ffffe000
[ 2140.702414] ff20: 00000000 ee853e04 ee86ff4c ee86ff38 c012bc18 c012b834 ee86e000 ee81e640
[ 2140.702422] ff40: ee86ff74 ee86ff50 c01488a0 c012bbf0 ee81e700 00000000 ee81e6c0 ee86e000
[ 2140.702431] ff60: ee81e640 ee81e718 ee86ffac ee86ff78 c0144bb0 c0148750 c0144a80 c0148744
[ 2140.702439] ff80: 00000000 ee81e6c0 c0144a80 00000000 00000000 00000000 00000000 00000000
[ 2140.702446] ffa0: 00000000 ee86ffb0 c0107bb0 c0144a8c 00000000 00000000 00000000 00000000
[ 2140.702454] ffc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[ 2140.702461] ffe0: 00000000 00000000 00000000 00000000 00000013 00000000 55555555 55555555
[ 2140.702463] Backtrace:
[ 2140.702520] [<bf407fa0>] (cppi41_dma_channel_program [musb_hdrc]) from [<bf3fee5c>] (musb_tx_dma_program+0x84/0xec [musb_hdrc])
[ 2140.702530]  r10:ed1f84f0 r9:00000200 r8:edd36048 r7:00000000 r6:edb25a00 r5:ed1f84f0
[ 2140.702533]  r4:bf407fa0
[ 2140.702581] [<bf3fedd8>] (musb_tx_dma_program [musb_hdrc]) from [<bf3ff2bc>] (musb_start_urb+0x3f8/0xd8c [musb_hdrc])
[ 2140.702589]  r9:bf40c484 r8:ed2af180 r7:0000008a r6:ed07e600 r5:ed07e600 r4:ed1f8010
[ 2140.702637] [<bf3feec4>] (musb_start_urb [musb_hdrc]) from [<bf3ffdd8>] (musb_advance_schedule+0x188/0x324 [musb_hdrc])
[ 2140.702646]  r10:00000000 r9:ed1f84f0 r8:ed1f84f0 r7:00000000 r6:ed1f8010 r5:ed2afe00
[ 2140.702648]  r4:ed07e600
[ 2140.702696] [<bf3ffc50>] (musb_advance_schedule [musb_hdrc]) from [<bf401768>] (musb_host_tx+0x364/0x794 [musb_hdrc])
[ 2140.702703]  r10:00000000 r9:ed2afe14 r8:ed1f8010 r7:edd36048 r6:00000c76 r5:00002000
[ 2140.702706]  r4:ed07e600
[ 2140.702754] [<bf401404>] (musb_host_tx [musb_hdrc]) from [<bf3fbfa0>] (musb_dma_completion+0x54/0x80 [musb_hdrc])
[ 2140.702761]  r10:200b0013 r9:f10b7c10 r8:edb25a28 r7:ed1f8010 r6:edd36048 r5:ed1f84f0
[ 2140.702764]  r4:edd36048
[ 2140.702812] [<bf3fbf4c>] (musb_dma_completion [musb_hdrc]) from [<bf4077ec>] (cppi41_trans_done+0x1a0/0x1ec [musb_hdrc])
[ 2140.702860] [<bf40764c>] (cppi41_trans_done [musb_hdrc]) from [<bf407b28>] (cppi41_recheck_tx_req+0x8c/0xf0 [musb_hdrc])
[ 2140.702868]  r10:200b0013 r9:ed1f8010 r8:edb25a28 r7:edb25a58 r6:edd36048 r5:edb25a1c
[ 2140.702870]  r4:edd36084
[ 2140.702918] [<bf407a9c>] (cppi41_recheck_tx_req [musb_hdrc]) from [<c017dd5c>] (__hrtimer_run_queues.constprop.4+0x174/0x1f8)
[ 2140.702925]  r9:00000000 r8:ee86e000 r7:000001f2 r6:6affe7f5 r5:edb25a28 r4:c0d198f8
[ 2140.702935] [<c017dbe8>] (__hrtimer_run_queues.constprop.4) from [<c017df70>] (hrtimer_run_softirq+0x78/0x110)
[ 2140.702942]  r10:00000008 r9:200b0013 r8:c0d19800 r7:15b223bf r6:5fe24aaf r5:00000000
[ 2140.702944]  r4:00000000
[ 2140.702961] [<c017def8>] (hrtimer_run_softirq) from [<c012b9bc>] (do_current_softirqs+0x194/0x23c)
[ 2140.702968]  r9:00000000 r8:04208140 r7:00000100 r6:c0d10628 r5:00000020 r4:ee86e000
[ 2140.702977] [<c012b828>] (do_current_softirqs) from [<c012bc18>] (run_ksoftirqd+0x34/0x74)
[ 2140.702984]  r10:ee853e04 r9:00000000 r8:ffffe000 r7:c0d105f4 r6:00000001 r5:ee81e640
[ 2140.702987]  r4:ffffe000
[ 2140.703002] [<c012bbe4>] (run_ksoftirqd) from [<c01488a0>] (smpboot_thread_fn+0x15c/0x288)
[ 2140.703005]  r5:ee81e640 r4:ee86e000
[ 2140.703021] [<c0148744>] (smpboot_thread_fn) from [<c0144bb0>] (kthread+0x130/0x160)
[ 2140.703028]  r9:ee81e718 r8:ee81e640 r7:ee86e000 r6:ee81e6c0 r5:00000000 r4:ee81e700
[ 2140.703043] [<c0144a80>] (kthread) from [<c0107bb0>] (ret_from_fork+0x14/0x24)
[ 2140.703050]  r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c0144a80
[ 2140.703053]  r4:ee81e6c0
[ 2140.703062] Code: e3a01000 e1a00004 ebfffbf4 eaffff92 (e7f001f2)

Part Number: OMAP-L138

Hi Support,

Need your help to review below schematic. Customer is using SiTime SiT5356 TCXO.

Thanks.

Part Number: TMS320C6652

Hi,

I am not using DDR for C6652. Is there any recommendation for DDRCLKP/N if DDR is unused for C6652.

Regards,

Divya

Part Number: TDA2EXEVM

I'm using TDAx2 EVM board and the train_cityscapes_segmentation.sh,  The frame rate of semantic segmentation examples can only reach around 8.3 frames。 The sparsity has reached 80%, how to achieve real-time semantic segmentation，at lest up to 20 frames?

Part Number: EVMK2G

Tool/software: TI-RTOS

Hi Experts,

The PA's user guide document in processor_sdk_rtos_k2g_5_02_00_10\demos\performance-audio\src\pasrc\paf\pa\docs\pa-ug_da8xx.pdf is not having so many chapters, it has only 5 chapters, but some of the content shows that refer some sections whih are not presented in the doc (e.g. refer Section 2.1.4.4, page no 32, also there is no pages from Page no 13 to 22 and so on). Could you please provide correct "pa-ug_da8xx.pdf" document? 

regards,

Lakshmi

Part Number: TMS320C6678

Hi,

I have a question about the SRIO transmitter swing setting.

My board : there are one C6678 and one FPGA, the SRIO connection between them is four lane, the baudrate is 3.125Gbps, the path setting is 4x mode.

When data transmit from the C6678 to the FPGA, I can see some 8B/10B decode error counts in FPGA's LANE0_STATUS register, and I measure the eye diagram of C6678 TX lane 0, the picture as below, the peak-to-peak voltage is about 200mV. And I checked the swing value in the SERDES_CFGTX0_CNTL register is already 15 (maxim value).

Is the peak-to-peak output voltage of my eye diatram correct? I ask that because I also measure the eye diagram of RX lane 0, the Vpp is about 300mV, it is bigger than TX lane 0. The below picture is RX lane signal.

How can I improve the signal quality?

Thank you,

Snaku

Part Number: PROCESSOR-SDK-AMIC110

Tool/software: Code Composer Studio

Hello,

I have created project AMIC110 for ethernet adapter. it is build successfully.

I have xds100 v2 and TMDXICE110 eval board.

I am using CCS7 version 7.3.0.0009.

but i am not able to debugg.

it shows error.

even if i tried to create debugg config my own it wont help either.

Kindly help me to start debugging and loading of the programm.

also share steps to create build configuration.

Regards,

Vrund

Part Number: AM5728

Tool/software: Linux

 I  want to use the SSD model in AM5728, so I port the example. I refered http://software-dl.ti.com/processor-sdk-linux/esd/docs/05_03_00_07/linux/Foundational_Components_TIDL.html and change the import configuration file which like these:

# Default - 0
randParams         = 0 

# 0: Caffe, 1: TensorFlow, Default - 0
modelType          = 0 

# 0: Fixed quantization By tarininng Framework, 1: Dyanamic quantization by TIDL, Default - 1
quantizationStyle  = 1 

# quantRoundAdd/100 will be added while rounding to integer, Default - 50
quantRoundAdd      = 25

numParamBits       = 8
# 0 : 8bit Unsigned, 1 : 8bit Signed Default - 1
inElementType      = 0 

inputNetFile      = "./deploy.prototxt"

inputParamsFile    = "./voc0712_ssdJacintoNetV2_iter_120000.caffemodel"

outputNetFile      = "./tidl_net_myjdetNet_ssd_768x320.bin"
outputParamsFile   = "./tidl_param_myjdetNet_ssd_768x320.bin"

rawSampleInData = 1
preProcType   = 4
sampleInData = "./trace_dump_0_768x320.y"
tidlStatsTool = "eve_test_dl_algo_ref.out"
# layersGroupId = 0	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	2	0
conv2dKernelType = 0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1


I commented the layersGroupId to make the model only run on DSP. And I change the main.cpp file which like following:

(Please visit the site to view this file)

And I can compiled the project successfully. But when I run it, there is a problem, how can I fix this?

./ssd_multibox -p 40 -d 1 -e 0 -f 1000 -i ./clips/pexels_videos_3623.mp4

Input: ./clips/pexels_videos_3623.mp4
111 
init done
Using Wayland-EGL
wlpvr: PVR Services Initialised
Using the 'xdg-shell-v5' shell integration
Confidence(%):
111 
opts.num_dsps=1 
2222 
ssd_multibox: inc/executor.h:172: T* tidl::malloc_ddr(size_t) [with T = char; size_t = unsigned int]: Assertion `val != nullptr' failed.

And I found the problem is  Executor* e_dsp = CreateExecutor(DeviceType::DSP, opts.num_dsps, c, 1); in main.cpp :209.

Please help me, thanks!

Part Number: AM5728

Tool/software: TI-RTOS

Hi,
  I am trying to setup a clock handle that will post a software interrupt every 10ms.
  BIOS_getCpuFreq() gives me the DSP frequency = 600MHz.

  I setup the clock with the given parameters :

    Clock_Params_init(&my_clk_params);
    my_clk_params.startFlag = TRUE;
    my_clk_params.period = 600000; //num_ticks_to_wait = 600000 600M ticks per second, hence 600000 ticks for 10ms delay?
    my_clk_params.arg = NULL;
    my_clk_handle = Clock_create(my_clock_handler, 100, &my_clk_params, NULL); // timeout value 100 not used as startFlag = TRUE ?

  I notice that the clock_handler fires off approximately every 7 minutes, instead of the expected 10ms.

  I configure the SWI as follows :

    Swi_Params_init(&my_swi_params);
    my_swi_params.arg0 = 0;
    my_swi_params.arg1 = 0;
    my_swi_params.priority = 1;
    my_swi_params.trigger = 1;
    my_swi_handle = Swi_create(my_swi_handler, &my_swi_params, NULL);
    
    Void my_clock_handler(UArg arg0)
    {
      Swi_post(my_swi_handle);
    }
    
    Void my_swi_handler(UArg arg0, UArg arg1)
    {
      sem_post(&my_semaphore);
    }

Did i miss anything while configuring the clock instance or software interrupt ?

Hi,

To disable ISS module writing PM_ISS_PWRSTCTRL (0x4AE0 7C80) register bits 1:0 to "00", So its power state will be in off state. But for testing purpose reading the PM_ISS_PWRSTST(0x4AE0 7C84) register which showing ISS in ON state. How to change the status of ISS power status register to off state?

To disable EVE module sequence followed is:
1.Change module state to off state

2. Reset the EVE module.

3. Change the clock state to hardware dependent. 

This sequence will disable the clock state as well as power state.

Is it correct sequence for to disable EVE?|

There is no reset functionality for ISS module.

Thank You!

Sagar

Part Number: AM3358

Tool/software: TI-RTOS

Hi

Interrupt is not working for UART AM3358 processor, can you please send the example code. 

Part Number: TMS320DM8168

Hi,

I was going through the EVM of DM8168 and has a doubt regarding NAND booting. Please clarify it.

As per the datasheet to select NAND booting, setting BTMODE[3:0] is enough, which can be set via SW3 on EVM.  But in EVM SW4 is also used to select NAND booting.

Actually, in EVM based on SW4(active low) input, AH7 pin of dm8168 is connected to the 9th pin /CE of NAND Flash via a 74CBTLV1G125CR (Lo-Vltg Single FET Bus Sw).

My doubt is if i can connect AH7 pin of dm8168 is to the 9th pin /CE of NAND and then by setting BTMODE[3:0] i can select NAND booting. In this way i can remove 74CBTLV1G125CR.

Actually i am not understanding the necessity of 74CBTLV1G125CR.

Please help me out with this..

Regards,

Shyama

Part Number: AM5728

Tool/software: Linux

The bash version of AM5728 is too low. How to install the new version？

Part Number: AM5728

Hello TI Experts,

I have an AM572x Evaluation Module TMDSEVM572X with me.

With reference to this thread here, I have already done changes related to dtb files in Android SDK 4.3 (kernel 4.4). I have then built the dtbs, compiled SDK and flashed the image onboard eMMC as per this link.

Despite of doing all this, I still do not see any entry of /dev/video1 on the AM5728 EVM for camera. I am not sure if I am missing any step here.

Please help.

Best Regards,

Devashish Tiwari

Part Number: AMIC110

Tool/software: TI-RTOS

Hi,

I am evaluating AMIC110. for my custom board i want to generate example project for different module like UART, SPI, etc.

While generation i am getting below error

Kindly help me to resolve this issue.

Regards

Vipin Mishra

Part Number: AM5746

Tool/software: TI-RTOS

Hi,

My customers have encountered a strange phenomenon.
HwiHdr execute twice in a single interrupt (GPIO).

(Please visit the site to view this file)

Question:
What is it that caused that issue?

■Environment
AM5746 custom board
pdk_am57xx_1_0_11
bios_6_76_00_08 (+ Mailbox.c/Task_smp.c modified)
　Fixed Task_setPri(), Task_getMode(), and Mailbox_post ().
　Sysbios team know.
ICE: Lauterbach TRACE32
SMP

Regards,

Rei

Part Number: TMDX654IDKEVM

Tool/software: TI-RTOS

Hello, I'm trying to adapt an existing example from the RTOS SDK (drv/gpio/test/led_blink) and I want to create an additional task. My question is , gpioLedBlinkTest_r5_per5f.c is generated using gpioLedBlinkTest_r5_per5f.cfg or is it manually configured. If it's generated is there a tool available for this?

Thanks,

Paul.

Part Number: TDA3XEVM

Tool/software: TI-RTOS

Hi

I use a camera connect to TDA3x

I want to use the capture to upsample  the in steam. But is failed 

I set the capture_out_width and capture_out_height is 2x than the capture_in_width and capture_in_height

But the display image is wrong like that

Than I set the capture_out_width and capture_out_height is 1/2x than the capture_in_width and capture_in_height

The image is ok.

I read the code ,than same define like this

Is than mean. The vip scaler  do not support upsample ?????