Part Number: TDA2P-ABZ
Hello everybody ,
please VSDK does not support TIDL use case ( see my other post ) .
coudl you help me on how to insert example and have something similar to TDA2 ?
any instruction / example ?
thank you
regards
Carlo
Part Number: TDA2P-ABZ
Hello everybody ,
please VSDK does not support TIDL use case ( see my other post ) .
coudl you help me on how to insert example and have something similar to TDA2 ?
any instruction / example ?
thank you
regards
Carlo
Part Number: AM5726
Hello,
I developed a circuit based on the TMDSEVM572X board. The processor used is the AM5726BABCX. As PMIC I use the TPS6590378ZWSR.
After switching on I see that the power sequence of the PMIC runs correctly. I can also measure the expected voltages. At the processor I can see that the warmreset signal toggles from low to high. However, it is so that it remains only for 470 ms on high and for 200 µs on low goes. All voltages are stable and doesn´t change their values.
I think the power consumption is very high with 4Watt..5Watt. The processor do nothing .. Is that normal?
Is that the right behavior if the processor does not find a boot medium?
There are a debug console available like at the processor AM355x?
best regards
Part Number: TMS320C6657
Tool/software: Code Composer Studio
Hello,
I was looking to use TMS320C6657 DSP for AEC. I am having issues using CCS to connect and run code to my EVMs. Is there any documentation available for the current software and hardware versions to help me interface with the EVM with CCS?
Thanks!
Adam
Part Number: AM5728
Hi,
I'm trying to change the clock driving the McASP ports. I've found the following note in the reference manual:
NOTE: The audio back end (ABE) module is not supported for this family of devices, but the ABE
name is still present in some clock or DPLL names.
I see lots of references to ABE, does that mean there is no ABE in the Sitara parts? If so, from where does the McASP ports get their clock?
In the AM572x_prcm_config.gel, I see on line 759 some configuration of the ABE for the Mcasp ports:
// DPLL MULT
// Output = 451.584 MHz
// Provides enough headroom so the McASP can evenly divide this down
// to multiple different sampling rates as the module does not
// contain a multiplier.
CM_CLKSEL_DPLL(CM_CLKMODE_DPLL_ABE) = 0xC809;
The note here of 451.584 Mhz seems to match what my MCASP clock is running at, but changing the values here and rerunning the gel file seems to have no impact.
Any ideas on how I can change the master clock for the MCASP ports?
Thanks...
Mike
Part Number: PROCESSOR-SDK-OMAPL138
Tool/software: TI-RTOS
I'm using the MCASP_Audio_lcdkOMAPL138_c674xExampleProject to pass through and analyze audio on the L13x/C674x development board. When I connect a stereo signal to the input, I get both channels downmixed into the right channel on the output.
What can I check to debug this? Looking at the audioSample_io.c source, in Audio_echo_Task(), it's not clear what data in appBuf_ptr_rx->buf or appBuf_ptr_tx->buf is left channel and what data is right channel, so I can't track a test signal.
art Number: TDA2E
Tool/software: Linux
Hi
I try to use make kernel_menuconfig to set governors is Performance.
But I use omapconf show opp to check freqency is still 1000HZ.
System also show can not find scaling_governor file message.
Did I less some procedure or DRA72x can not use kernel_menuconfig set A15 freqency?
thanks
Yumei
Part Number: TDA2SG
Tool/software: Linux
Hi, all,
I use the SDK 3.0.5 and turn on the fast boot function in my TDA2x board.
I used the core-tex A15 u-boot to load the IPU/DSP firmware and boot them.
After the Linux kernel boot finished, I get the message
2.713536 s: ***** IPU2 Firmware build time 19:56:30 Jun 18 2019
2.713688 s: *** SYSTEM: CPU Frequency <ORG = 212800000 Hz>,<NEW = 16393 Hz>
2.716891 s: SYSTEM: System Common Init in progress !!!
The IPU2 frequency is too low, but the other core frequency the correct
2.589123 s: ***** DSP1 Firmware build time 19:54:43 Jun 18 2019
2.589214 s: *** SYSTEM: CPU Frequency <ORG = 600000000 Hz>, <NEW = 600000000 Hz>
2.589489 s: SYSTEM: System Common Init in progress !!!
If IPU2 firmware is load and boot from Linux, the frequency is
*** SYSTEM: CPU Frequency <ORG = 212800000 Hz>, <NEW = 212800000 Hz>
how can I change the IPU2 frequency to correct setting?
Part Number: TDA2EXEVM
Tool/software: TI-RTOS
Hi Sir,
I am running "4CH AVB Capture + Surround View (DSPx) + AVB_TX/Display" use case with SDK 3.6 on TDA2x EVM,
I connected 4 AVB cameras to TDA2x EVM Ethernet port 1 wtih a 8 port switch,
I confirmed that HDMI can output surround view image on TV and I can get TX stream from Ethernet port 1 via switch.
Could I change the TX stream output port to "Ethernet port 2" ?
Thanks.
Ranny.
Part Number: TMS320C6747
Tool/software: Code Composer Studio
Hi,
We have purchased EVM Board of OMAP-L137/TMS320C6747 floating point starter kit.
The kit contains three CD/DVD
1) OMAP-L137/TMS320C6747 Demonstration version of MontaVista pro 5.0
includes Installers for -> MV PRO 5.0 System Tools and Target File System
(DVD 1 includes Demonstration version of MontaVista pro 5.0
(DVD 2 includes OMAP L137 ARM/DSP installers // XDC tools // DSP Code Gen tools......etc)
2)OMAP-L137/TMS320C6747 Platform CCS v3.3 IDE(DVD 3)
Now we are having CCS version V7.1.0 .If we want to continue with CCs v7.1.0 and with both these installers (DVD 1 includes Demonstration version of MontaVista pro 5.0
(DVD 2 includes OMAP L137 ARM/DSP installers // XDC tools // DSP Code Gen tools......etc) .
Q1) Will it work with newer version or we have install only CCS V3.3?
Q2) For Windows platform of CCS which DVD 1 or DVD 2 we have to install.
Regards,
Ashrumochan
Part Number: AM5718
Tool/software: Linux
Hi.
I connected VideoDAC as a circuit connected to the VOUT1 output of AM5718 and set it to output to analog RGB monitor.
The following is the video DAC connection circuit.
As shown in the reference thread, jitter occurs in HSYNC, and it is possible to observe 1 to 2 pixel variations
left and right on the connected analog monitor display.
Can I connect such a circuit to the AM5718's VOUT1 output?
Also, VIDEO1_PLL is used as a reference clock source.
Is it possible to reduce jitter by changing the internal connection to use this HDMI_PLL?
Regards,
Koji
Part Number: 66AK2H06
Hi,
I have a customer who is designing 66AK2H06 custom board.
He is using EVM2K as a reference (see below power block).
Q1) There are two UCD74120 ICs used for CVDD (ARM and DSP AVS power supplies).
I guess this is only because one UCD74120 is not enough to supply CVDD.
Correct?
Q2) UCD7242 has two channels and each one is used for CVDDD0V95(= CVDD1 for DSP) and CVDDA0V95(=CVDD1T for ARM), respectively.
I understood each channel can supply up to 10A based on UCD7242 datasheet.
http://www.ti.com/product/UCD7242
Why two channels are needed to provide CVDD1 and CVDD1T?
Using only one channel for both power rails may cause an issue?
Thanks and regards,
Koichiro Tashiro
Part Number: DRA77P
Tool/software: Linux
Hi,
In our custom board, we had implemented the uart2 connection for our GNSS module. We were using the ti_processor_sdk_linux_automotive_dra7xx-evm_5_00_00_01 with kernel version 4.4, on using cat /dev/ttyS1 we were able to get the GPS coordinates. The change we made was in the dra76-evm.dts where uart2 status was enabled.
We have now ported to latest kernel version 4.14, where we are unable to get the gps coordinates from the uart2 (even with same configuration of dt as prev. version). No values are received at the uart2 (ttyS1).
We have used the same pin mux configuration which was used in 4.4.
Are there any further changes required ?
The dt configuration we used were
uart2{
status="okay";
} ;
Regards,
Padmesh
Part Number: TMS320DM8168
Hi,
I am connecting the I2C0 line (SCL,SDA) of DM8168 to 3 PCM3168 Audio codec to configure them..Can i connect them directly or should i use a 1:3 I2C BUFFER?
Regards,
Shyama
Part Number: TMS320DM8168
Hi,
I am connecting the MDIO and MCLK line of DM8168 to 2 Ethernet PHY ..Can i connect them directly or should i use a 1:2 I2C BUFFER?
Regards,
Shyama
Part Number: EVMK2H
Tool/software: Linux
Hi, everybody
I run dsp code on dsp0 on EVMK2H,using command line to reset ,load and run like below,
mpmcl reset dsp0
mpmcl load dsp0 test.out
mpmcl run dsp0
It is OK in most cases. but sometime it reset fail like below.
But when I turn off power of EVMK2H, and turn on again .It run OK and reset success.
I don't know why reset failed sometime.Do someone know about that?Or have any clue or tips to debug ?
Thanks
Best Regards
WD
Part Number: TMS320C6678
Hello,
We are planning to design and develop h264 or even h265 video compression module using tms320c6678. I did not find any development board of this dsp which is completely for video development, so that we can get an idea of how we can connect analog video decoders to the dsp.
Therefore, i want to ask this question in this forum that how should be the interface of video decoder which will be of 10 bit or even more with the dsp mentioned above. Which port or interface is best to connect with decoder. Any suggestion will be more than just welcome.
Aamir
Part Number: AM3359
Tool/software: Linux
Hi,
we are using IrDA/SIR communication between two AM335x boards running Linux in our machines. Now we are considering upgrading towards IrDA/FIR mode.
Does anybody use AM335x CPUs with IrDA FIR mode (4Mbit/s)? We are aware that this requires a special FIR kernel driver. Does anybody have such a driver or know of its existance?
Matthias
Part Number: AM3352
Hello,
Regarding to VBUS filter constants on AM3352, my customer is asking some question.
(Question)
1)According to EVM(TMDSSK3358), register and capacitor value on VBUS filter are 1.2Kohm(R134)/
0.1uF(C213). How much resistor and capacitor value can these configure as maximum?
2)It seems that Zener diode can place on VBUS filter.
Is it available to reduce ringing or noise?
Regards,
Tao 2199
Part Number: TDA2PXEVM
Tool/software: Linux
Hello:
We'are working on VisionSDK 3.05, for the QT environment we copy from PSDKLA 3.4.3 which the QT version is 5.6.
To support the full-screen and position control on QT application, we should select the ivi-shell in weston which require the QT version is newer than 5.7
we saw the PSDKLA 5.00 support the QT 5.9
http://processors.wiki.ti.com/index.php?title=Processor_SDK_Linux_Automotive_Release_Notes
Component | Version |
---|---|
Linux Kernel | 4.14.79+ (2018 LTS) |
U-Boot | 2018.01+ |
Yocto Project | 2.4 (Rocko) |
Linaro Toolchain (gcc) | 7.2.1 hard-float |
Qt | 5.9.7 |
Wayland | 2.0 |
GStreamer | 1.12 |
processors.wiki.ti.com/index.php
Component | Version |
---|---|
Linux Kernel | 4.4.84+ (2016 LTS) |
U-Boot | 2016.11+ |
Yocto Project | 2.1 (Krogoth) |
Linaro Toolchain (gcc) | 5.3 2016.02 hard-float |
Qt | 5.6 |
Wayland | 1.9 |
GStreamer | 1.6 |
Thanks.