Part Number:TMDXEVM8148
Tool/software: Linux
Is it possible to get a copy of an image file with the demo software for this board, or a replacement SD card? I lost the one that came with my system.
Thank you
--cs
Part Number:TMDXEVM8148
Tool/software: Linux
Is it possible to get a copy of an image file with the demo software for this board, or a replacement SD card? I lost the one that came with my system.
Thank you
--cs
Part Number:AM5728
I am trying to implement time critical algorithm on C66x that requires to process about 32kB of data. The algorithm is relatively simple and clearly bonded by the width of data bus. Because in the target environment there are also other, more complex tasks running in the background, L1 memory has to be configured as cache only. L2 is configured as 128kB of cache and remaining part as SRAM. To better analyse the issue that I am observing, I am using the following assembly code:
SPLOOP 2 LDDW *AYPTR++[2], AH || LDDW *BYPTR++[2], BH LDDW *AYPTR++[2], AH || LDDW *BYPTR++[2], BH SPKERNEL NOP 9
Before running this code whole content of L1 data cache is invalidated. The trace for the SPLOOP is below.
It is easy to notice a lot of pipeline stalls occurring when access to the next L1 cache line happens. The stalls actually takes more time than actual processing. Is there a way to improve performance for this kind of algorithm? I know about the touch function, but it gives mixed results where no all data are evicted between consecutive runs. I also assume, that to use IDMA I need to configure L1 as SRAM? What else can be done to reduce the number of cycles wasted on pipeline stalls?
Part Number:AM5728
Tool/software: Linux
I compiled an executable program in C/C++,and I want to set the program start automatically in root when I start the linux system.But I found that login operation is after automatical starting program.How can I set the program start automatically in root account.Could systemd mechnism achieve it?
Thanks for any help.
Part Number:AM5728
Tool/software: Linux
1.I install the linux CCS-V7.4 in Ubuntu 16.04.5. and the ti-processor-sdk-rtos-am57xx-evm-05.01.00.11-Linux-x86-Install.bin
2.I create a new CCS project about uart by using the pdksetupenv,sh and pdkprojectcreat.sh
3.when i build the peoject ,i get a problem like this:
/home/jailhouse/ti/pdk_am57xx_1_0_10/packages/ti/boot/sbl/tools/scripts/AM57xImageGen.sh: line 37: mono: command not found
What should I do to fix it ?
Part Number:TDA3XEVM
Hi,
I'm working on object detection algorithm.When pedestrian/vehicle is detected, rectangle is drawn around the object.
There are some functions in draw2d.c on those file which draws rectangle.
If I want to display some data around rectangle what is the way to do?
Regards,
Anil
Part Number:AM5728
Tool/software: Linux
Hi,
I am interfacing 2 SPI devices with AM5728.which are connected to same SPI bus.Device 1 is having driver and Device 2 is not having any device specific driver. i want to access them one after the other.
Is it possible to access the device 2 which is not having any driver?
whether the device 1 which is having the driver will always make bus busy?
If the device 1 occupies the bus from driver i will not be able to access the device 2 .Is there any way to access the device 2?
Regards,
Vijay
Part Number:J6EVM5777
Hello TI,
I want ti enter recovery form uboot, what should i modify uboot code?
I use 6ao1.1 standard uboot.
Part Number:TDA2PXEVM
Hello All:
As we discussed before that VisionSDK is not support the QT environment.
We have the AVM which is developed by QT that we need to porting to VisionSDK.
This AVM will create two QT windows(part of the whole screen) that each window will run OpenGL to render the output to parts of the screen.(Eg. 50%s for each window),
please see the diagram as following
For now, without QT window support, how can we:
1. Create multiple window(or surface) for each OpenGL?
2.Each OpenGL render only render part(50%) of the screen?
Any suggestion is appreciated!
Part Number:AM4388
Tool/software: Linux
Dear Team
When we set date on the secure custom board, the date is reset again on next booting. We have tried the following so far:
# dmesg | grep rtc
root@am438x-epos-evm:~# dmesg | grep rtc
[ 0.280336] platform 44e3e000.rtc: Cannot lookup hwmod 'rtc'
[ 2.517325] hctosys: unable to open rtc device (rtc0)
[ 11.059882] omap_rtc 44e3e000.rtc: _od_fail_runtime_resume: FIXME: missing hwmod/omap_dev info
[ 11.060973] Modules linked in: rtc_omap(+) wkup_m3_rproc(+) remoteproc sch_fq_codel uio_module_drv(O) uio cryptodev(O) cmemk(O)
[ 11.061363] [<bf057ee4>] (omap_rtc_probe [rtc_omap]) from [<c054b53c>] (platform_drv_probe+0x58/0xb4)
[ 11.061472] [<c054b44c>] (__platform_driver_register) from [<bf05d01c>] (omap_rtc_driver_init+0x1c/0x1000 [rtc_omap])
[ 11.061490] [<bf05d000>] (omap_rtc_driver_init [rtc_omap]) from [<c0101a7c>] (do_one_initcall+0x4c/0x170)
[ 11.087344] Modules linked in: omap_wdt(+) rtc_omap(+) wkup_m3_rproc(+) remoteproc sch_fq_codel uio_module_drv(O) uio cryptodev(O) cmemk(O)
[ 11.087673] [<bf057ee4>] (omap_rtc_probe [rtc_omap]) from [<c054b53c>] (platform_drv_probe+0x58/0xb4)
[ 11.087784] [<c054b44c>] (__platform_driver_register) from [<bf05d01c>] (omap_rtc_driver_init+0x1c/0x1000 [rtc_omap])
[ 11.087802] [<bf05d000>] (omap_rtc_driver_init [rtc_omap]) from [<c0101a7c>] (do_one_initcall+0x4c/0x170)
[ 11.088075] Modules linked in: omap_wdt(+) rtc_omap(+) wkup_m3_rproc(+) remoteproc sch_fq_codel uio_module_drv(O) uio cryptodev(O) cmemk(O)
[ 11.088126] PC is at omap_rtc_probe+0x150/0x524 [rtc_omap]
[ 11.088396] [<bf057ee4>] (omap_rtc_probe [rtc_omap]) from [<c054b53c>] (platform_drv_probe+0x58/0xb4)
[ 11.088502] [<c054b44c>] (__platform_driver_register) from [<bf05d01c>] (omap_rtc_driver_init+0x1c/0x1000 [rtc_omap])
[ 11.088517] [<bf05d000>] (omap_rtc_driver_init [rtc_omap]) from [<c0101a7c>] (do_one_initcall+0x4c/0x170)
So, I try to manually set the date in linux as:
root@am438x-epos-evm:~# date 121015182018
Mon Dec 10 15:18:00 UTC 2018
root@am438x-epos-evm:~# hwclock -w
hwclock: can't open '/dev/misc/rtc': No such file or directory
root@am438x-epos-evm:~# hwclock -r
hwclock: can't open '/dev/misc/rtc': No such file or directory
Since, it is showing the device is not created at /dev/misc/rtc, thus I modified the .dts file to add the following lines:
/* fixed 32k external oscillator clock */
clk_32k_rtc: clk_32k_rtc
{
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;
};
&rtc {
clocks = <&clk_32k_rtc>, <&clk_32768_ck>;
clock-names = "ext-clk", "int-clk";
status = "okay";
};
But still to no avail. Please provide your suggestions to get the linux to read proper RTC time.
Part Number:TDA2PXEVM
Tool/software: Linux
Hi,
I use Vision SDK 3.4. When I review the code in IpcInLink_drvTranslateSystemBufferPayloadPtrs function of vision_sdk/links_fw/src/hlos/links_a15/ipcIn/ipcInLink_drv.c, I notice the following code
snippet, please pay attention to how the size is calculated, seems it is in accordance with NV12 format regardless of the real input format. According to my knowledge, at least additional YUV422 should
be available for Video Frame, please correct me if I have made some mistake.
Part Number:AM3357
Tool/software: TI-RTOS
Hi Team,
I met one software issue with a RMII design on customers' board. Please help to check as below.
Hardware platform:
Customers’ product board with RMII design.
we have designed an board based AM3357, according to ICEV2.
the difference between our board and ICEV2 is that we have three ethernet port: 2 for PRU-ICSS and 1 for CPSW. there is no pin reuse in our board.
the PHY in our board is
Software environment:
in Uboot and Linux environment, RMII is set by device tree, the port can work, we can ping it success. so there is no hardware problem in our board.
but in RTOS environment, it can't work!
the sdk that we are using is ti-processor-sdk-rtos-am335x-evm-05.00.00.15-Windows-x86-Install
experiment
firstly, we modified the am335x_icev2_pinmux_data.c. the new CPSW discription is shown as
#if defined(BUILDCFG_MOD_CPSW)
static pinmuxPerCfg_t gCpsw0PinCfg[] =
{
{
/* MDIO -> mdio_clk -> M18 */
PIN_MDIO_CLK, 0, \
( \
PIN_MODE(0) | \
((PIN_PULL_TYPE_SEL) & (~PIN_PULL_UD_EN & ~PIN_RX_ACTIVE)) \
) \
},
{
/* MDIO -> mdio_data -> M17 */
PIN_MDIO_DATA, 0, \
( \
PIN_MODE(0) | \
((PIN_PULL_TYPE_SEL | PIN_RX_ACTIVE) & (~PIN_PULL_UD_EN)) \
) \
},
{
/* RMII1 -> rmii1_crs_dv -> H17 */
PIN_GMII1_CRS, 0, \
( \
PIN_MODE(1) | \
((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
) \
},
{
/* RMII1 -> rmii1_rxer -> J15 */
PIN_GMII1_RXER, 0, \
( \
PIN_MODE(1) | \
((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
) \
},
{
/* RMII1 -> rmii1_txen -> J16 */
PIN_GMII1_TXEN, 0, \
( \
PIN_MODE(1) | \
((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL & ~PIN_RX_ACTIVE)) \
) \
},
{
/* RMII1 -> rmii1_txd0 -> K17 */
PIN_GMII1_TXD0, 0, \
( \
PIN_MODE(1) | \
((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL & ~PIN_RX_ACTIVE)) \
) \
},
{
/* RMII1 -> rmii1_txd1 -> K16 */
PIN_GMII1_TXD1, 0, \
( \
PIN_MODE(1) | \
((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL & ~PIN_RX_ACTIVE)) \
) \
},
{
/* RMII1 -> rmii1_rxd0 -> M16 */
PIN_GMII1_RXD0, 0, \
( \
PIN_MODE(1) | \
((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
) \
},
{
/* RMII1 -> rmii1_rxd1 -> L15 */
PIN_GMII1_RXD1, 0, \
( \
PIN_MODE(1) | \
((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
) \
},
{
/* RMII1 -> rmii1_refclk -> H18 */
PIN_RMII1_REFCLK, 0, \
( \
PIN_MODE(0) | \
((PIN_PULL_TYPE_SEL | PIN_RX_ACTIVE) & (~PIN_PULL_UD_EN)) \
) \
},
{PINMUX_INVALID_PIN}
};
then we executed the gmake in the cmd window, when finished we import the project NIMU_BasicExample_icev2AM335x_armExampleproject and rebuild it.
after load the program and run we got the following result
It seems that the connection is successed, but the ping form our host computer is failed!
the program is shown as:
SOCCtrlCpswPortMacModeSelect(1, ETHERNET_MAC_TYPE_RMII);
SOCCtrlCpswPortMacModeSelect(2, ETHERNET_MAC_TYPE_RMII);
EMAC_socGetInitCfg(0, &cfg);
cfg.numPorts = 1;
cfg.port[0].phy_addr = 1;//EMAC_CPSW_PORT0_PHY_ADDR_ICE2;
//cfg.port[1].phy_addr = -1;//EMAC_CPSW_PORT1_PHY_ADDR_ICE2;
cfg.macModeFlags = EMAC_CPSW_CONFIG_MODEFLG_FULLDUPLEX| EMAC_CPSW_CONFIG_MODEFLG_IFCTLA;
EMAC_socSetInitCfg(0, &cfg);
I don't know why the ping is failed, please help me, thanks!
Tool/software: Linux
Hi,recently downloaded from the official PROCESSOR-SDK-LINUX-AM335X 02_00_02_11 version of the SDK development bbb, encountered the following problems, need help。Compile SDK according to the "Sitara_Linux_Program_the_eMMC_on_Beaglebone_Black" documents。Two of these patch "0001-Change-finduuid-to-use-mmcdev.patch.gz" and "sitara_flasher_initramfs_rev_1.0.tar.gz" can not be downloaded,Can you provide it?
In make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf-O=flasher_usb am335x_evm_usb spl_defconfig allcompiled the u-boot-spl-restore.bing, to the u-boot-spl-restore.img, in the the the example:
U-Boot SPL 2015.07-00063-gda2d8cb (Sep 19 2018 - 13:59:33)
Using default environment
usb_ether
Error: usb_ether address not set.
using musb-hdrc, OUT ep1out IN ep1in STATUS ep2in
MAC 98:5d:ad:cb:68:a1
HOST MAC de:ad:be:af:00:00
RNDIS ready
musb-hdrc: peripheral reset irq lost!
high speed config #2: 2 mA, Ethernet Gadget, using RNDIS
USB RNDIS network up!
BOOTP broadcast 1
BOOTP broadcast 2
BOOTP broadcast 3
BOOTP broadcast 4
BOOTP broadcast 5
BOOTP broadcast 6
BOOTP broadcast X has been printed, unable to download u-boot.img images to ram.How do I modify the uboot source code?Please tell me?
Part Number:OMAP3530
I have adesign where an OMAP 3530 is powered from a PMIC TPS65920.
The VMMC output from the PMIC is very low and the part gets overheated. There is no short-circuit on this output.
The rest of power rails to the OMAP are O.K.
Using an oscilloscpe, I observed a periodic signal of about 200uS Low time and a period of about 7mS from the OMAP SYS_NRESWARM to the PMIC NRESWARM input.
In addition, when the system is powered-up, the OMAP UART3 outputs the 40W string to the terminal, but with a slightly lower baud-rate than 115,200 (about 110,000bps).
Please advise.
Thanks -
Koby Kluger
Part Number:AM5718
Hello everybody ,
please two question on this latest version :
1- there is no more in in Step1 chip select : why ?
2- about SW leveling is it reccomended ? should I stay HW ?
thank you
regards
carlo
Part Number:TDA2EXEVM
Hi ,
I am trying to build the new PROCESSOR_SDK_VISION_03_05_00_00
And I use gmake -s -j depend and face the following error:
"System can not find the specific file."
Please help me.
Thank you.
Best Regards,
Eric Lai
Part Number:PROCESSOR-SDK-AM335X
Tool/software: Linux
Hi
We are using latest SDK ver5.0
1) How can I customize my rootfs before burn it to sd/mmc ?
2) Is it possible to extract the roofts gz file provided by sdk and run "opkg reomve pkg-name"?
3) Is there other tool then opkg for updating rootfs.
Thanks
Part Number:AM5728
Tool/software: Linux
1.My board is evmAM5728,the vision of the CCS is 7.4, the vision of SDK is 0403
2.Now I want to bring up the RTOS DSP program from the linux ARM ,is there any example about it? Or some explain about it ?
Hello,
I should programmer CC2640R2F-Q1 and need a evaluation board for it.
I checked about CC2640R2F board but isn't there a specific evaluation board only for CC2640R2F-Q1 ?
Best regard
Part Number:AM5726
Hi,
I have question about Slew Rate control for DDR3.
Q1: What is the SR control register prepared for the purpose?
What effect does this register have?
Q2: If it is set to Fastest (SR [2:0] = 0x0) on my customer board, the signal quality deteriorated and failed the DDR3 compliance test.
Although it is stated that the default setting (Fastest) is used for the data sheet, can we change this according to customer's use?
Q3: The SR[2:0] registers can be changed, why is not it guaranteed except the default setting?
Best Regards,
H.U