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Soft Error Rate estimator calculator

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We need to estimate the Soft Error Rate for our product. TI has a lnk about it ( http://www.ti.com/support-quality/faqs/soft-error-rate-faqs.html ), where you say:

We generally do not test products but designed test chips containing production SRAM arrays and sequential logic arrays to enable accurate modeling of SER. These are combined into an online SER estimator calculator that can be used to gauge the upper-bound for SER in any TI products made in CMOS technologies (350nm to 20nm). The calculator requires an NDA for external customers.

So how can we sign the NDA and get access to this calculator?


TDA2: data flow of cascade_radar_object_detect

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Part Number:TDA2

Hi, 

I am about to use TDA2 to collect and process cascaded 1243 data. I downloaded and installed the PROCESSOR_SDK_RADAR_03_04_00_00 package. 

For C:\ti\PROCESSOR_SDK_RADAR_03_04_00_00\vision_sdk\apps\src\rtos\radar\src\usecases\cascade_radar_object_detect this demo, I see the datapath is shown in the figure below: 

I am wondering if the Select step is to select data from different 1243 radar(Q0,Q1,Q2,Q3) and what is the order of merging the data after fft? And if possible, where could I find the source code doing this step?

Thanks.

CCS/CCSTUDIO: TMS320C6418 External flash boot

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Part Number:CCSTUDIO

Tool/software: Code Composer Studio

Hi there,

for my application I'm thinking about running the code located into an external EEPROM. I would generate a .bin file with the hex application and then store it into the EEPROM.

I would like to have a "bootloader" and the "application", so that:

- the "bootloader" is  started with the ROM boot mode (CE1), it checks if an "application" program is stored into the EEPROM and run it;

- the "application" is the actual application code that has to run.

I will then need two binary images to be stored into the EEPROM: the "bootloader.bin" and "application.bin":

BOOTIMAGE @ EMIFA CE1 0x9000 0000

APPIMAGE @ EMIFA CE1 0x9000 1000

What is the best solution for this?

How can i modify the .cmd file so that the code can be executed directly from the external flash?   

Thanks

Regards

Stefano

Linux/AM3359: CLPRU shared memory errors

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Part Number:AM3359

Tool/software: Linux

I am compiling a test pru program.  When I link it with the arm program, I get the wrong address for the shared memory.  If I get the address from the compiler .map file and manually set it, it works. 

AM5728: CMB connections

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Part Number:AM5728

Hi-
I am using the circular microphone array reference board from TI using PCM1864. I have couple of questions in terms of connecting the Circular microphone array board to the AM5728's I2S interface.

a )  I have connected BCLK from microphone array board to the McASP2_ACLKX.  Is it the right connection?

  • Since in our design,  AM572x is a McASP slave - McASP2 is supposed to receive the bit clock. Should i configure the pin to receive mode?
b) I have connected LRCLK from microphone array board to McASP2_ACLKR. Again , is it the right connection or should i connect the LRCLK to MCASP2_FSR in AM5728 EVM
Thanks for the help,
Lenin

Linux/AM5728: RTOS examples build issues

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Part Number:AM5728

Tool/software: Linux

Hi,

I am using am5728 evm  on rtos linux sdk latest 05. i installed pdk and myexamples projecr creation. imorted into ccs8 . I imported blinkledarm572x and DCAN examples . when i tried to build it showa some error. In DCAN example I2Csoc.c is unrefferenced. and in led example mono not found.   guide me how to resolve these errors.  suggest me  any example in pdk file for video capturing in rtos linux sdk. for camera module attached on the board. 

Thaks and regards,

K Subrahmaniam

TDA3XEVM: Lane detection algorithm - standalone environment

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Part Number:TDA3XEVM

Hi,

I'm trying to build the lane detection algorithm (REL.200.V.LD.C66X.00.03.00.00) for TDA3X EVM but the build is getting build.

In the rules.mk file,TARGET_SOC is vayu/vme.Is this only for TDA2x?

Is there any process to build for TDA3x EVM?

Regards,

Anil

66AK2G12: Setting up 1ms timer for 66AK2G12

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Part Number:66AK2G12

Hi,

I'm setting up a timer demo on my EVMK2G board and looked at the timer_test.c demo file for this in my pdk_k2g_1_0_10 folder. The defines to decide what code to use for setting up the clock source don't cover the EVMK2G, just the "AM" series starting with " AM572x".

Is there a timer demo for the EVMK2G I can get from somewhere?

Thanks,

Steve


TMS320DM355: Difference between DM355SDZCEA216 and TMS320DM355DZCEA21

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Part Number:TMS320DM355

What is the difference between DM355SDZCEA216 and TMS320DM355DZCEA21?

AM4378: eMMC not found in U-boot

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Part Number:AM4378

My company has designed a custom board based heavily on the AM437x Starter Kit. We have added an eMMC chip to the MMC1 port on the bootable pins (selected from the TRM to ensure bootability) and removed the conflicting connections from the starter kit on those lines. The sysboot configurations are setup for MMC0->MMC1->USB1->USB0 with a uSD card connected to MMC0 the same way as in the starter kit. Our customized device tree file is working for the kernel (version from tisdk 5.0.0.15) and once we're in the Linux environment when booting from the uSD card the eMMC is enumerated as mmcblk1 and is fully accessible. 

The issue is that I cannot seem to make the eMMC on MMC1 visible in the u-boot environment or from SPL. Since the MMC1 bus is working in the LInux environment I know the device tree is setup correctly in the Linux environment but when I try to point to that device tree to compile MLO and u-boot the SPL stage doesn't boot at all (nothing prints on power-up or system reset).

When the u-boot environment starts from the uSD card (using the default 'am437x-gp-evm' dtb file for compilation) it prints out the only found MMC device is MMC0 and when I execute "mmc dev 1" it reports nothing found. Here is the a copy of the terminal behavior from powering on the board with a uSD in the socket. 

U-Boot SPL 2018.01-00228-g555fffa9f6-dirty (Sep 26 2018 - 11:35:14)
Trying to boot from MMC1
SPL: Please implement spl_start_uboot() for your board
SPL: Direct Linux boot not active!
reading u-boot.img
reading u-boot.img
reading u-boot.img
reading u-boot.img


U-Boot 2018.01-00228-g555fffa9f6-dirty (Sep 26 2018 - 11:35:14 -0400)

CPU  : AM437X-GP rev 1.2
Model: TI AM437x SK EVM
DRAM:  1 GiB
PMIC:  TPS65218
NAND:  0 MiB
MMC:   OMAP SD/MMC: 0
*** Warning - bad CRC, using default environment

Net:   <ethaddr> not set. Validating first E-fuse MAC
cpsw, usb_ether
Hit any key to stop autoboot:  0
=> mmc list
OMAP SD/MMC: 0 (SD)
=> mmc rescan
=> mmc list
OMAP SD/MMC: 0 (SD)
=> mmc dev 1
MMC Device 1 not found
no mmc device at slot 1

I reached my current point after formatting the eMMC within the Linux environment to be basically a copy of the uSD card. I created 2 partitions with start and stop sectors and fs types/bootable property that matched the card. Then I copied the boot partition contents from the uSD to the eMMC. I was also able to extract a fs image to the linux partition of the eMMC. With a known working MLO file on the eMMC's boot partion, trying to boot without the uSD card inserted results in this printout:

U-Boot SPL 2018.01-00228-g555fffa9f6-dirty (Sep 26 2018 - 12:10:32)
Trying to boot from MMC2 spl: could not find mmc device. error: -19 SPL: failed to boot from all boot devices ### ERROR ### Please RESET the board ###

I believe this indicates that I just need to create a working device tree for u-boot or SPL to use, that instantiates the MMC1 bus but I can't figure out why using my dts file that works under Linux breaks the hardware boot stage.

It is basically the opposite problem from this e2e thread except that our design has the uSD card on MMC0 and the eMMC on MMC1: 

Linux/AM4378: mcasp rx clock failure with all captured samples from i2s = 0x0000

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Part Number:AM4378

Tool/software: Linux

My problem is that when I run arecord all of the samples in the captured file are 0x0000.

I have a pcm1862 connected to mcasp0 as defined in the .dts file here:

msp0_pcm1862_pins_default: mcasp0_pcm1862_pins_default {
        pinctrl-single,pins = <
                0x19c ( PIN_INPUT | MUX_MODE0 ) /* (M24) mcasp0_ahclkr.mcasp0_ahclkr */
                0x1a0 ( PIN_INPUT | MUX_MODE0 ) /* (L23) mcasp0_aclkr.mcasp0_aclkr */
                0x1a4 ( PIN_INPUT | MUX_MODE0 ) /* (K23) mcasp0_fsr.mcasp0_fsr */
                0x1ac ( PIN_INPUT | MUX_MODE2 ) /* (L24) mcasp0_ahclkx.mcasp0_axr3 */
        >;
};

There are no connections to the other mcasp0 signals. Here are analyzer captures during arecord showing the BCK, LRCK and DATA signals on the i2s bus connected to mcasp0.

I added register reads, writes and printk statements to davinci-mcasp.c to help troubleshoot this problem. The labels should match the names in "AM437x and AMIC120 ARM® Cortex™-A9 ProcessorsTechnical Reference Manual" with the omission of MCASP_. The first captures shows the contents of the registers that I think have an impact prior to writing to them in start_rx.

The next capture shows the contents of the registers after the writes and then when stop_rx is called. Here is the code for the register writes which includes setting bit 6 in ACLKXCTL so that there is no dependency between the TX clocks and RX clocks. Here is code where I write new values to registers:

mcasp_set_reg(mcasp, DAVINCI_MCASP_RXCLKCHK_REG, 0x003F0000);
mcasp_set_reg(mcasp, DAVINCI_MCASP_RXSTAT_REG, 0xFFFFFFFF);
mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, TX_ASYNC);
__davinci_mcasp_set_clkdiv(mcasp, MCASP_CLKDIV_BCLK, 8, 0);

Setting bit 6 of ACLKXCTL got me passed the problem of the interrupt not firing but the captured file is all zeros (except for the header) even though the analyzer trace shows data. I am still getting an RX clock failure indication and I think it might be related to my problem.

I would like to get some direction where to look next. Any help would be appreciated.

AM4376: AM4376 SysBoot options

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Part Number:AM4376

We have our custom hardware configured as highlighted. What we have found is syssboot11 pin needs to be pulled low for the NAND boot to work. UART boot is not effected by bit 11. Can you comment on this observation. Is there a documentation error? if sysboot11 is high, am4376 foes not boot from NAND.

DATA CONVERTERS INTERFACING TO OMAPL138 USING UPP

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Sir,

I wanted to connect AD9361 an agile transceiver to Mity DSP L138 . Is it possible to directly connect the ADC/DAC output of AD9361 to the UPP pins of OMAP L138.

Linux/PROCESSOR-SDK-AM335X: USB Driver dominating CPU time

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Part Number:PROCESSOR-SDK-AM335X

Tool/software: Linux

Our boards make use of the AM335x chip.  We have a USB device port on our boards that we use for data transfer between the board and a Windows Laptop.  We use the g_ether and rndis drivers in Linux to support IP across this connection.

When we do an SFTP transfer from Windows to the board we see that the USB driver is using a disproportionately large amount of the CPU time.  This results in other processes on the board getting deprived for time.

The question I have is, is there a way to have the usb drivers share more of the CPU time than they are? 

Linux/AM3352: Crypto driver crash on big files

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Part Number:AM3352

Tool/software: Linux

Champs,

Customer reported the crash and I am able to reproduce it on BBB using the latest SDK (kernel 4.14). Steps to reproduce are as follows:

1. Boot the target with the OOB PSDK 5 SD card

2. Place a large (>60 MB) bin file on the target FS

3. Run:

root@am335x-evm:~# HMAC_KEY="12345678901234567890123456789012"
root@am335x-evm:~# FILE="xac"
root@am335x-evm:~# dd if="$FILE" bs=16 skip=3 2> /dev/null | openssl dgst -sha256 -hmac $HMAC_KEY -engine cryptodev| sed 's/^.* //'

after a few minutes run it crashes with the following trace:

[ 136.289013] NET: Registered protocol family 15
[ 136.876866] Initializing XFRM netlink socket
[ 192.679623] ------------[ cut here ]------------
[ 192.684549] WARNING: CPU: 0 PID: 873 at /oe/bld/build-CORTEX_1/arago-tmp-external-linaro-toolchain/work-shared/am335x-evm/kernel-source/mm/page_alloc.c:3877 __alloc_pages_nodemask+0x1cc/0xd40
[ 192.706040] Modules linked in: xfrm_user xfrm4_tunnel ipcomp xfrm_ipcomp esp4 ah4 af_key xfrm_algo sha512_generic sha512_arm sha256_generic sha1_generic sha1_arm_neon sha1_arm md5 aes_arm_bs crypto_simd cryptd des_generic cbc bc_example(O) pru_rproc usb_f_acm u_serial pruss_intc pruss usb_f_ecm musb_dsps phy_am335x musb_hdrc phy_am335x_control phy_generic g_multi usb_f_mass_storage usb_f_rndis u_ether libcomposite udc_core snd_soc_simple_card snd_soc_simple_card_utils pm33xx wkup_m3_ipc wkup_m3_rproc remoteproc pvrsrvkm(O) omap_aes_driver crypto_engine omap_crypto omap_sham ti_emif_sram pruss_soc_bus musb_am335x rtc_omap omap_wdt sch_fq_codel uio_module_drv(O) uio usbserial usbcore usb_common cryptodev(O)
[ 192.773478] CPU: 0 PID: 873 Comm: openssl Tainted: G O 4.14.40-g4796173fc5 #1
[ 192.781792] Hardware name: Generic AM33XX (Flattened Device Tree)
[ 192.796026] Backtrace:
[ 192.798541] [<c010ba48>] (dump_backtrace) from [<c010bd2c>] (show_stack+0x18/0x1c)
[ 192.809712] r7:00000009 r6:00000000 r5:c0a9d190 r4:00000000
[ 192.817549] [<c010bd14>] (show_stack) from [<c0829588>] (dump_stack+0x24/0x28)
[ 192.827090] [<c0829564>] (dump_stack) from [<c0128ab4>] (__warn+0xe8/0x100)
[ 192.836216] [<c01289cc>] (__warn) from [<c0128b84>] (warn_slowpath_null+0x28/0x30)
[ 192.845960] r9:01080020 r8:0000000e r7:c0d4db74 r6:01080020 r5:00000000 r4:c0d031d0
[ 192.855869] [<c0128b5c>] (warn_slowpath_null) from [<c01cbaf0>] (__alloc_pages_nodemask+0x1cc/0xd40)
[ 192.867156] [<c01cb924>] (__alloc_pages_nodemask) from [<c01cc67c>] (__get_free_pages+0x18/0x30)
[ 192.878386] r10:03c00000 r9:03c00010 r8:db0a9910 r7:00000040 r6:d8dc0000 r5:00000000
[ 192.888474] r4:db107800
[ 192.891076] [<c01cc664>] (__get_free_pages) from [<bf0b52c4>] (omap_sham_handle_queue+0x7a4/0xa9c [omap_sham])
[ 192.905223] [<bf0b4b20>] (omap_sham_handle_queue [omap_sham]) from [<bf0b5624>] (omap_sham_update+0x68/0xa8 [omap_sham])
[ 192.918329] r10:dc70aa70 r9:d8d76000 r8:00000003 r7:d8dc0000 r6:00000000 r5:db121000
[ 192.928432] r4:db107800
[ 192.931055] [<bf0b55bc>] (omap_sham_update [omap_sham]) from [<bf0035b4>] (cryptodev_hash_update+0x3c/0xc8 [cryptodev])
[ 192.945879] r5:db121000 r4:db12105c
[ 192.949540] [<bf003578>] (cryptodev_hash_update [cryptodev]) from [<bf0020c4>] (hash_n_crypt+0xe8/0x144 [cryptodev])
[ 192.963693] r4:db121000
[ 192.966304] [<bf001fdc>] (hash_n_crypt [cryptodev]) from [<bf00262c>] (crypto_run+0x204/0x520 [cryptodev])
[ 192.980153] r7:03c00010 r6:00000000 r5:db121000 r4:d8d77ddc
[ 192.988002] [<bf002428>] (crypto_run [cryptodev]) from [<bf001988>] (cryptodev_ioctl+0x448/0xa9c [cryptodev])
[ 193.000149] r8:00000003 r7:d8d77ddc r6:00000051 r5:d8d7e480 r4:be8c639c
[ 193.009113] [<bf001540>] (cryptodev_ioctl [cryptodev]) from [<c023411c>] (do_vfs_ioctl+0xa8/0x930)
[ 193.020395] r9:d8d76000 r8:00000003 r7:c01c6368 r6:00000003 r5:db7fe3c0 r4:be8c639c
[ 193.030453] [<c0234074>] (do_vfs_ioctl) from [<c02349e0>] (SyS_ioctl+0x3c/0x60)
[ 193.040102] r10:00000000 r9:d8d76000 r8:be8c639c r7:c01c6368 r6:00000003 r5:db7fe3c0
[ 193.050194] r4:db7fe3c0
[ 193.052784] [<c02349a4>] (SyS_ioctl) from [<c0107d20>] (ret_fast_syscall+0x0/0x54)
[ 193.064112] r9:d8d76000 r8:c0107f04 r7:00000036 r6:be8c63d8 r5:be8c63d4 r4:00000000
[ 193.071907] ---[ end trace f7279e358f60fc67 ]---
[ 193.080628] omap_sham_copy_sgs: Couldn't allocate pages for unaligned cases.
[ 193.089946] cryptodev: openssl[873] (waitfor:286): error from async request: -12
[ 193.099522] cryptodev: openssl[873] (hash_n_crypt:98): CryptoAPI failure: -12
Error Signing Data
failed

I also monitored LowFree number in /proc/meminfo and it continuously decreases during the run and does not increase back even if I stop the the process before the crash. Customer is also suspecting memory leak. 

Your insights are greatly appreciated!

Michael


TMS320C6678: How do FPGA DSP slices relate to DSP Ti cores,

Linux/AM3358: Reading half of ADC value during Uboot stage.

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Part Number:AM3358

Tool/software: Linux

Hi,

I am writing some code for the Uboot to check battery voltage when the processor power up. 

For some reason my ADC value is roughly half of what it should be. instead or 1.6V i get 944mV. I read 0x00000864 from the FIFO

I have changed the Number of Average, FIFO, Internal VREF, and Clock Speed. And still no luck I get the same 944mV value.

After the Kernel boots and do a read using in_voltage0_raw() I get the right voltage from the ADC 1.6V.

I changed the voltage going into the ADC and across the 0-1.8V range. I am reading half the voltage.

Is there a instruction or flag I am missing to read the ADC during Uboot.

RTOS/TDA2PXEVM: Unable to load from CCS or SD card

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Part Number:TDA2PXEVM

Tool/software: TI-RTOS

Hi, 

I am developing on a TDA2PXEM with Radar SDK v.3.04 and CCS v.8.1.0. I have been able to successfully generate the binaries, MLO, and Appimage. However, when I put the EVM in SD mode and insert the SD card with the MLO + Appimage, there is no output from the serial terminal. Similarly, when I put the EVM in debug mode, and load + run the binaries, there is also no output from the serial terminal. I have verified the COM port and baud rate of the serial terminal. Why might the EVM not be booting up correctly? 

Thanks,

Richard 

Does anyone make a rapid io server.

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Does anyone make a RapidIO server or one with storage.

TDA2: Flickering is observed on displaying fisheye frame by using Opengl es in Vision Sdk 3.02

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Part Number:TDA2

HI,

We have a problem about displaying fisheye frames by using Opengl es in Vision Sdk 3.02. We have posted a question which is flagged as solved, but the problem is still unsolved actually.

e2e.ti.com/.../2700090

We also saw a bug fix in release note for Vision Sdk 3.04. According to the description, it seems like our problem.

ADASVISION-1877[TDA2xx Linux] Flickering is observed on running
back to back sgx related UC
S1-CriticalVISION_SDK_03_03_00_00

Can you describe this bug fix in depth?

And because we have developed our system on vision sdk 3.02 a lot, can we get a patch for this bug for vision sdk 3.02.

Mason Su

Best regards

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