root@ubuntu:/# export TI_SDK_PATH=/home/star/Desktop/ti-sdk-omapl138-lcdk-01.00.00

root@ubuntu:/# $PATH

bash: /usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin:/usr/games:/usr/local/games: No such file or directory

root@ubuntu:/# source linux tool chain for omapl138ux-devkit/environment-setup

bash: linux-devkit/environment-setup: No such file or directory

root@ubuntu:/#

i tried to setup linux tool chain for omapl138 by following omapl138 lcdk linux sdk getting startguide

do need to connect lcdk kit to host pc running linux please suggest how to proceed

Hi all,

I have an application that use OMAP 138. Could the DSP and ARM cells get acces to peripheral at the same time?

For example, DSP uses SPI and UART and ARM uses Ethernet.

Thanks,

Artem

For example，I need several DSP pins that have the high-impedance state before bootload code from a external Flash.This pins connect to the Flash high address lines.Afterwards，these pins will be as GPIOs to control the Flash high address lines.I know these pins like GP0[1],GP0[2],GP[3] meet my needs.

I wonder whether pins like GP0[15],GP0[11],GP0[10] meet my needs? As we all know,PINMUX registers have default value after reset or OMAP-L138 startup.As the same time，Pins like GP0[15],GP0[11],GP0[10] select the function PRU，but their type is INPUT.As this sentence in the Brief Description of the Problem above，can I understand these pins also have the high-impedance state?

thank  you！

 For example，I need several DSP pins that have the high-impedance state before bootload code from a external Flash.This pins connect to the Flash high address lines.Afterwards，these pins will be as GPIOs to control the Flash high address lines.I know these pins like GP0[1],GP0[2],GP[3] meet my needs.

I wonder whether pins like GP0[15],GP0[11],GP0[10] meet my needs? As we all know,PINMUX registers have default value after reset or OMAP-L138 startup.As the same time，Pins like GP0[15],GP0[11],GP0[10] select the function PRU，but their type is INPUT.As this sentence in the Brief Description of the Problem above，can I understand these pins also have the high-impedance state?

I am using DSP Bios version 5.42.01.09 and Code Composer Studio version 5.5.0.00077.
I would like some sample code for using semaphores on the ARM.

When I try to include sem.h I get errors because it seems as if DSP Bios does not have #ifdef for the ARM processor. 

It all works with the DSP C6748, but I cannot get it to work with the ARM.

The errors are below:

"C:/ti/CCSv5/bios_5_42_01_09/packages/ti/bios/include/fxn.h", line 24: error #20: identifier "Arg" is undefined

"C:/ti/CCSv5/bios_5_42_01_09/packages/ti/bios/include/fxn.h", line 25: error #20: identifier "Arg" is undefined

"C:/ti/CCSv5/bios_5_42_01_09/packages/ti/bios/include/sts.h", line 49: error #20: identifier "LgInt" is undefined

"C:/ti/CCSv5/bios_5_42_01_09/packages/ti/bios/include/sts.h", line 54: error #20: identifier "LgInt" is undefined

"C:/ti/CCSv5/bios_5_42_01_09/packages/ti/bios/include/sts.h", line 59: error #20: identifier "LgInt" is undefined

"C:/ti/CCSv5/bios_5_42_01_09/packages/ti/bios/include/swi.h", line 26: error #93: identifier-list parameters may only be used in a function definition

"C:/ti/CCSv5/bios_5_42_01_09/packages/ti/bios/include/swi.h", line 26: error #101: duplicate parameter name

"C:/ti/CCSv5/bios_5_42_01_09/packages/ti/bios/include/swi.h", line 70: error #20: identifier "Arg" is undefined

"C:/ti/CCSv5/bios_5_42_01_09/packages/ti/bios/include/swi.h", line 71: error #20: identifier "Arg" is undefined

"C:/ti/CCSv5/bios_5_42_01_09/packages/ti/bios/include/swi.h", line 122: error #20: identifier "Arg" is undefined

"C:/ti/CCSv5/bios_5_42_01_09/packages/ti/bios/include/swi.h", line 122: error #20: identifier "Arg" is undefined

"C:/ti/CCSv5/bios_5_42_01_09/packages/ti/bios/include/swi.h", line 123: error #20: identifier "Arg" is undefined

"C:/ti/CCSv5/bios_5_42_01_09/packages/ti/bios/include/swi.h", line 123: error #20: identifier "Arg" is undefined

I am trying to flash a DSP application on my TMDX LCDK 138 using the serial port UART2. I was able to do this few months ago and now the application would not start after downloaded and I boot from Flash. This is what worked for me before and now it doesn't:, please let me know if there is a better procedure, or if I am doing something wrong. I am using CCS version 6.1.3.00033

1) I build my application's .out file using a platform as shown in the attached figure. I am using SYS/BIOS so in my .cfg file I added the following to force the reset vector to start at 0xc0000000. 

var Hwi = xdc.useModule('ti.sysbios.family.c64p.Hwi');

Hwi.resetVectorAddress = 0xc0000000;

2) My .map file shows this for entry point:

ENTRY POINT SYMBOL: "ti_sysbios_family_c64p_resetVector" address: c0000000

3) I build and in Debug mode, download to target with JTAG and I am able to run the program successfully, and created a app.out file. I also verified the silicon rev. is d800k008

4) I imported the bootloader_armv5_omapl138_lcdkOMAPL138 project to CCS (version 6.1.3.00033) and built it after changing the following line in the bl_main.c file:

unsignedint DspEntryPoint = 0xc0000000; //to make sure bootloader has the entry point address

built it and created a boot.out file

5) I opened AISGen and used used an existing configuration file which has 16bit NAND plus other settings to convert the boot.out file into a boot.ais file

6) I converted the app.out file to app. bin file using application out2rprc.exe as explained in processors.wiki.ti.com/.../OMAPL138_StarterWare_Booting_And_Flashing

7) now I Ihave a boot.ais and an app.bin file and use the following to flash the two:

8) I set the dipswitches to serial boot and connect a USB cable on J3 UART-usb, and get the BOOTME message when connected to COM3 using Teraterm. I close Teraterm to disconnect and run the following command to flash the target

>sfh_OMAP-L138.exe -flash boot.ais app.bin -targetType OMAPL138_LCDK -flashType NAND -APPStartAddr 0xC0000000 -APPLoadAddr 0xC0000000 -p COM3

The result is apparently sucessful as shown in the screen capture attached, but when putting the dipswitches to boot from flash and after reset the program doesn't run, which is essentially a blinking LED. I used to get a good outcome some months ago, perhaps I am missing something in one of the steps, or if there is a simpler method to do this, please let me know,

HI,

We are working on ARM+DSP with IPC interface ,we created the project as per the document we also take care non-overlapping of memory. It is working fine with debug mode but after flashing it have trouble to boot.

I tested with OMAP_LCDK EVK with IPC Handshaking example given by TI for that also its not booting . I debug the flash-code handshaking is not happening with both cores after booting.

Please do needful as soon as earliest .

Regards

Abhishek

Hai,

I am using OMAPL138 LCDK presently  i am generated hello file. Then after i am connected board through minicom serial terminal.

Based on Reference Manual:-processors.wiki.ti.com/.../OMAP-L138_LCDK_Linux_SDK_Getting_Started_Guide

Actually in Minicom i am using ttyS0 and 115200 buard rate. but not displaying anything could you give any suggestions for debugging.

Thanks

Hai,

Hai i am using OMAPL138 LCDK Board video Loop Back camer i am configuring for Linux 3.1.10 and the default configuration omapl1380_lcdk_defconfig i am using and make menuconfig also not working errors showing:

[linux-devkit]:/home/ram/Desktop/ti/board-support/linux-3.1.10> ARCH=arm CROSS_COMPILE=arm-arago-linux-gnueabi- make omapl138_lcdk_defconfig
HOSTCC scripts/basic/fixdep
In file included from /home/ram/Desktop/ti/linux-devkit/arm-arago-linux-gnueabi/usr/include/sys/types.h:26:0,
from scripts/basic/fixdep.c:106:
/home/ram/Desktop/ti/linux-devkit/arm-arago-linux-gnueabi/usr/include/features.h:325:0: warning: "__STDC_ISO_10646__" redefined [enabled by default]
#define __STDC_ISO_10646__ 200009L
^
In file included from <command-line>:0:0:
/usr/include/stdc-predef.h:54:0: note: this is the location of the previous definition
#define __STDC_ISO_10646__ 201103L
^
In file included from /home/ram/Desktop/ti/linux-devkit/arm-arago-linux-gnueabi/usr/include/features.h:355:0,
from /home/ram/Desktop/ti/linux-devkit/arm-arago-linux-gnueabi/usr/include/sys/types.h:26,
from scripts/basic/fixdep.c:106:
/home/ram/Desktop/ti/linux-devkit/arm-arago-linux-gnueabi/usr/include/bits/stdlib.h:65:8: warning: no previous prototype for ‘ptsname_r’ [-Wmissing-prototypes]
__NTH (ptsname_r (int __fd, char *__buf, size_t __buflen))
^
/home/ram/Desktop/ti/linux-devkit/arm-arago-linux-gnueabi/usr/include/sys/cdefs.h:48:52: note: in definition of macro ‘__NTH’
# define __NTH(fct) __attribute__ ((__nothrow__)) fct
^
In file included from /home/ram/Desktop/ti/linux-devkit/arm-arago-linux-gnueabi/usr/include/netinet/in.h:24:0,
from /home/ram/Desktop/ti/linux-devkit/arm-arago-linux-gnueabi/usr/include/arpa/inet.h:23,
from scripts/basic/fixdep.c:116:
/home/ram/Desktop/ti/linux-devkit/arm-arago-linux-gnueabi/usr/include/stdint.h:153:0: warning: "__INT64_C" redefined [enabled by default]
# define __INT64_C(c) c ## LL
^
<built-in>:0:0: note: this is the location of the previous definition
In file included from /home/ram/Desktop/ti/linux-devkit/arm-arago-linux-gnueabi/usr/include/netinet/in.h:24:0,
from /home/ram/Desktop/ti/linux-devkit/arm-arago-linux-gnueabi/usr/include/arpa/inet.h:23,
from scripts/basic/fixdep.c:116:
/home/ram/Desktop/ti/linux-devkit/arm-arago-linux-gnueabi/usr/include/stdint.h:154:0: warning: "__UINT64_C" redefined [enabled by default]
# define __UINT64_C(c) c ## ULL
^
<built-in>:0:0: note: this is the location of the previous definition
In file included from /home/ram/Desktop/ti/linux-devkit/arm-arago-linux-gnueabi/usr/include/sys/socket.h:40:0,
from /home/ram/Desktop/ti/linux-devkit/arm-arago-linux-gnueabi/usr/include/netinet/in.h:25,
from /home/ram/Desktop/ti/linux-devkit/arm-arago-linux-gnueabi/usr/include/arpa/inet.h:23,
from scripts/basic/fixdep.c:116:
/home/ram/Desktop/ti/linux-devkit/arm-arago-linux-gnueabi/usr/include/bits/socket.h:427:23: warning: ‘struct mmsghdr’ declared inside parameter list [enabled by default]
__const struct timespec *__tmo);
^
/home/ram/Desktop/ti/linux-devkit/arm-arago-linux-gnueabi/usr/include/bits/socket.h:427:23: warning: its scope is only this definition or declaration, which is probably not what you want [enabled by default]
fixdep: error fstat'ing depfile: scripts/basic/.fixdep.d: Invalid argument
make[1]: *** [scripts/basic/fixdep] Error 2
make: *** [scripts_basic] Error 2

[linux-devkit]:/home/ram/Desktop/ti/board-support/linux-3.1.10> make menuconfig
HOSTCC scripts/basic/fixdep
In file included from /home/ram/Desktop/ti/linux-devkit/arm-arago-linux-gnueabi/usr/include/sys/types.h:26:0,
from scripts/basic/fixdep.c:106:
/home/ram/Desktop/ti/linux-devkit/arm-arago-linux-gnueabi/usr/include/features.h:325:0: warning: "__STDC_ISO_10646__" redefined [enabled by default]
#define __STDC_ISO_10646__ 200009L
^
In file included from <command-line>:0:0:
/usr/include/stdc-predef.h:54:0: note: this is the location of the previous definition
#define __STDC_ISO_10646__ 201103L
^
In file included from /home/ram/Desktop/ti/linux-devkit/arm-arago-linux-gnueabi/usr/include/features.h:355:0,
from /home/ram/Desktop/ti/linux-devkit/arm-arago-linux-gnueabi/usr/include/sys/types.h:26,
from scripts/basic/fixdep.c:106:
/home/ram/Desktop/ti/linux-devkit/arm-arago-linux-gnueabi/usr/include/bits/stdlib.h:65:8: warning: no previous prototype for ‘ptsname_r’ [-Wmissing-prototypes]
__NTH (ptsname_r (int __fd, char *__buf, size_t __buflen))
^
/home/ram/Desktop/ti/linux-devkit/arm-arago-linux-gnueabi/usr/include/sys/cdefs.h:48:52: note: in definition of macro ‘__NTH’
# define __NTH(fct) __attribute__ ((__nothrow__)) fct
^
In file included from /home/ram/Desktop/ti/linux-devkit/arm-arago-linux-gnueabi/usr/include/netinet/in.h:24:0,
from /home/ram/Desktop/ti/linux-devkit/arm-arago-linux-gnueabi/usr/include/arpa/inet.h:23,
from scripts/basic/fixdep.c:116:
/home/ram/Desktop/ti/linux-devkit/arm-arago-linux-gnueabi/usr/include/stdint.h:153:0: warning: "__INT64_C" redefined [enabled by default]
# define __INT64_C(c) c ## LL
^
<built-in>:0:0: note: this is the location of the previous definition
In file included from /home/ram/Desktop/ti/linux-devkit/arm-arago-linux-gnueabi/usr/include/netinet/in.h:24:0,
from /home/ram/Desktop/ti/linux-devkit/arm-arago-linux-gnueabi/usr/include/arpa/inet.h:23,
from scripts/basic/fixdep.c:116:
/home/ram/Desktop/ti/linux-devkit/arm-arago-linux-gnueabi/usr/include/stdint.h:154:0: warning: "__UINT64_C" redefined [enabled by default]
# define __UINT64_C(c) c ## ULL
^
<built-in>:0:0: note: this is the location of the previous definition
In file included from /home/ram/Desktop/ti/linux-devkit/arm-arago-linux-gnueabi/usr/include/sys/socket.h:40:0,
from /home/ram/Desktop/ti/linux-devkit/arm-arago-linux-gnueabi/usr/include/netinet/in.h:25,
from /home/ram/Desktop/ti/linux-devkit/arm-arago-linux-gnueabi/usr/include/arpa/inet.h:23,
from scripts/basic/fixdep.c:116:
/home/ram/Desktop/ti/linux-devkit/arm-arago-linux-gnueabi/usr/include/bits/socket.h:427:23: warning: ‘struct mmsghdr’ declared inside parameter list [enabled by default]
__const struct timespec *__tmo);
^
/home/ram/Desktop/ti/linux-devkit/arm-arago-linux-gnueabi/usr/include/bits/socket.h:427:23: warning: its scope is only this definition or declaration, which is probably not what you want [enabled by default]
fixdep: error fstat'ing depfile: scripts/basic/.fixdep.d: Invalid argument
make[1]: *** [scripts/basic/fixdep] Error 2
make: *** [scripts_basic] Error 2

Hi

Team

I want to know the procedure to generate the Ubl.bin file from UBL ARM source folder that is provided as ARM UBL bootloader .

when I compile it in ccsv5 I get the .out file I want to know how to generate the ubl.bin file, Should I use the AIS tool to generate the bin file as DSp.bin is generated from AIS .for DSP UBL

Thank you

Deepak R  

I don't find these information in the datasheet.

Could you please tell me?

When the GPIOs are configured as input or output，in two cases their level is not the same?

Thanks！

We have failed units which do not pass a memory address/address complement test (stock bits at certain addresses) on an asynchronous Dual Port Memory.

Setup:

   Asynchronous DPM memory interfaced to OMAPL138 thru EMIFA.

   External DPM memory interfaced to DSK5510 thru EMIF controller.

   Memory tests executed by loading test software via JTAG on OMAPL138 DSP core, and to DSK5510 evaluation board (tests are executed separately).

   Cache is disabled on both systems.

   Code is compiled without optimizations, and pointers to memory addresses to test are volatile.

Behavior:

   Test software on both interfaces (internally and externally, OMAPL138 and DSK5510 respectively) fail to detect the memory errors.

   Both tests write a block of memory of 128KB then read back the expected pattern successfully (which should fail).

   When a long delay is implemented after the memory block is written (and before reading) tests on both interfaces detect the errors successfully.

Questions:

   Can the EMIF interfaces of both/either system (OMAPL138 and DSK5510) cache data written to the DPM memory?

   Can this be a transient memory error (which shows after a certain amount of time has elapsed since data is written to the address)?

Hi experts,

I have an OMAP l-138 LCDK board running the linux kernel 3.3.0. So far, i already made and execute on the target board an hello world program using a text editor and the ti-sdk-omapl138-lcdk-01.00.00 on Ubuntu.

I would like to develop a small graphic application to control one LED with the board, and i would like to ask you for some guidance... I am completely lost, i have spend the hole day searching for examples, trying to create and execute a project in code composer, trying to compile some examples, but i haven't no success at all...

There's any example showing how to manipulate a GPIO pin? (I already have activated the GPIO option on the linux kernel menuconfig, under sys/classe/gpio i can see some of these pins)

And for PWM? (i have activated the corresponding option on the kernel menuconfig, but i cannot see any node under /sys/classes/pwm... the pwm modules shouldn't be there?)


If you could show me an example it will be great.

Thanks,
Pedro

Hopefully this does not snowball too long but I have some basic questions about using timers in sysbios with the omapl137 that I can't figure out from the documentation: sysbios manual and omapl137 technical reference. spruex3q and spruh92d

1. Is sysbios using 1 of the 2 timers of the omapl137? I think the answer is yes but I'm not 100% sure.
2. Most of the xdc configuration for timers, in the app.cfg, is in us resolution or counts? Should I control the timer using period in counts if I need less than ms or can I specified fractional ms?
3. Is count driven by the CPU clock directly or is there some division? In the technical reference I get the impression that count could be drive by the internal clock directly, which then referring to the PLL section looks like the count is driver directly from SYSCLK1.

The timers can be use to Output and Event (TM64P_OUT12) and trigger a DMA. I would like to use the timers in 32 bit mode unchained, one for the out event and one for the DMA. (this is to control the timing of an SPI ADC at 600 KHz)

1. My first worry, is that, if I'm using sysbios I can't do this since 1 timer is already taken and the omapl137 only has 2 timers.
2. I did not see support in the app.cfg to perform these two task (DMA and out event), is it supported or do I need to configure it outside the app.cfg?

Hi Champs,

I'm using the C6748 MMC/SD controller. I've read the TRM(SPRUH79C) CH.25, but I'm not sure whether the CMD/DAT logic reset by setting the CMDRST/DATRST bit in the MMCCTL cause the MMC/SD controller registers to alter.

So, could you please let me clarify it?

Best regards,
j-breeze

I have the rCSL timer code up and running with timer 0 and timer 1. I modified a copy of the code to timer 1 as I'm under the impression SYSBIOS uses timer 0 by default, although if it is not, I'm setting the clock module to use timer 0.

Now I'm trying to use the rCSL to control the timers but from SYSBIOS.

I have taken the following steps:

0- new project, sysbios typical

1- copy all necessary source code to the rtsc project

2- use the app.cfg to map the event id with interrupts 4-7 with 4 hwi

3- copy the core of the example into a task

4- changed while(runExample); for a sempaphore

5- added a counter on timer34 which is the one toggling the GPIO led

Commenting out #4 (using while(runExample);)

I get the following error:

ti.sysbios.gates.GateMutex: line 99: assertion failure: A_badContext: bad calling context. See GateMutex API doc for details.
xdc.runtime.Error.raise: terminating execution

I can put breakpoints on all ISR (the timer interrupts and the compare interrupts) and the code halts accordingly. 

counter on timer34 isr gets stuck at 1. which means I get into the ISR but it is only triggered once. I double checked that TCR_ENAMODE34 is set to EN_CONT.

If I implement a semaphore instead of while()

00
B16=0x0 B17=0x0
B18=0xc00170b6 B19=0xc0017a98
B20=0xc000b7fc B21=0x0
B22=0xf B23=0x0
B24=0x0 B25=0xc0015468
B26=0x0 B27=0xc0015468
B28=0xffffffff B29=0xffffffff
B30=0xfffffff7 B31=0x0
NTSR=0x1000f
ITSR=0xf
IRP=0xfffffff6
SSR=0x0
AMR=0xc0015440
RILC=0xc0000850
ILC=0xc000ad50
Exception at 0xc0017bc0
EFR=0x2 NRP=0xc0017bc0
Internal exception: IERR=0x8
Opcode exception
ti.sysbios.family.c64p.Exception: line 256: E_exceptionMax: pc = 0x00000000, sp = 0xc0015500.
xdc.runtime.Error.raise: terminating execution

counter on timer34 isr gets stuck at 1

Additional Notes:

I created a new platform that adds timer1 to the platform address since I recall having issues accessing peripherals in the past. (Just to be safe)

Any ideas or suggestion of things I can try?

hI

tEAM 

i SEARCHED FOR THE LINK OF THE AIS GEN TOOL THAT IS COMPATIBLE FOR GENERATING THE ARM AS WELL AS DSP APPLICATION!

i NEED THE PATH WHERE TO DOWNLOAD!

kINDLY NEED HELP ON THIS!

tHANK YOU

DEEPAK r

As per the document provided in the release DaVinci-PSP-SDK-03.20.00.13 in 50 page

For OMAP-L137 (or DA830, AM17xx)
When using CCStudiov3.3:
1. Start CCStudio v3.3.
2. From the menus, choose Project->Open.
3. Browse to the extracted ARM UBL source and open the ubl-omapl1x7.pjt project.
• To build for SPI Flash, select the "Config" option as BOOT_SPI in CCStudio window.
• To build for NAND Flash, select the "Config" option as BOOT_NAND in CCStudio window.
4. From the menus, choose Project->Build. When the build is complete:
• The Intel hex format binary (ubl-xxx.bin) file is generated in the Project Root directory.
• The executable ELF binary (ubl-xxx.out) file is generated in the Project Root directory.
• The Project Root directory is <armubl-install-dir>\ccsv3.3\
5. The files generated by the build procedure, have to be flashed.
• In case of DSP BOOT devices like OMAP-L137 or DA830, the Intel hex format binary file is suitable for
flashing.

when I try building(Build) the project i get an error as attached in the image! But rebuilding (rebuild)the code compiles

I am trying to do this to Check weather the .bin files gets generated or not as specified in the document 

HELP REQUIRED ON THIS!

Thank you

Deepak R

Hi,

In my project we need to get boot time of 3sec from power up.

So it seems Linux is off the table, we reached an image (uImage) of size 2.5MB including initramfs and the boot time stands on 9.7 sec from power up.

Loading from NAND16 (UBL,Uboot,Kernel,initramfs).

 If i need only basic access to GPIO/I2C/SPI interfaces and a communication channel between the arm and the DSP. 

Is SYS/BIOS on ARM is enough ? and did somebody already done it ? and can say how difficult it may be ?

Is  StarterWare can be a good solution ?

Thanks

Hen