Hi,
At the moment we have a design with an OMAP-L138 in combination of a Micron DDR2 device. In this design we use no series termination between the devices.
This is our situation:
After measurements we see that there is an overshoot with a maximum voltage peak on the bus around 2,4 - 2,5 volt. The measurement was done on the DQS and DQ lines. This seemed quite high to us and want to reduce it with the reduce setting in the DDR2 itself. (A read from the DDR2 chip is causing at the OMAP the concerns. A write to the DDR2 device is okay and should not be changed.)
When we change the setting to the "reduced drive-strength" 2 out of 3 boards did not boot anymore so I was looking in the datasheet for values which I can use to determine if the overshoot is a problem which we maybe overlooked before the measurement.
So I found the following:
"These IO specifications apply to the dual-voltage IOs only and do not apply to DDR2/mDDR or SATA interfaces. DDR2/mDDR IOs are 1.8V IOs and adhere to the JESD79-2A standard.”
I looked in the JESD79-2B (revised JESD79-2A) standard and found out that the overshoot can be 0.9 (so 2.7V peak on the bus) on the lines which are giving the concerns. (This level stayed the same after the revision to 2B).
My question, does the OMAP-L138 withstand these overshoots on the DDR pins without damaging the chip and compromising lifetime and function of the chip over time? Or if the chip can't handle these overshoots, what should I use as maximum overshoot values?
Thank you in advanced.