C6746 C674x Memory Protection Unit MPU configuration and event / interrupt handling

Hello!

I've configured the DDR Ram MPU (MPU2) to grant no access to an (existing) region of DDR Ram. Configuration was clear from the docs (SPRUFK5A "Mega module reference guide" and SPRUH80A "Technical Reference Manual").

Now i'm not sure how i can enter a ISR when an access to this protected area happens and what needs to be configured before. SPRUH80A, p95 chapter 5.2.9.2 states that the MPU will yield the MPU_BOOTCFG_ERR but i couldn't find it in the DSP Interrupt Map on Page 77.

- Which Event maps to a MPU2 Protection/Address error?

- Are there any further requirements

- Is there example code for the DDR MPU2 and maybe also for L2/L1P/L1D Data protection?

find below some code excerpts that i used.

unsigned int* p = 0xC0800000;

// Clear any old status
MPU->IENSTAT = 0x3;

// Enable the interrupts
MPU->IENSET = 0x3;

// RAM no access
MPU->PROG4_MPSAR  = 0xC0800000; // start address
MPU->PROG4_MPEAR  = 0xC3BFFFFF; // end address
MPU->PROG4_MPPA   = 0xC0;       // no access

*p = 0x5A5A5A5A;

// check MPU->FLTSTAT
// check MPU->FLTADDRR