Part Number:TMS320C6678
Hi,
I observed a case in C6678 DSP Hyperlink that my Host SW(PC SW) read C6678 Hyperlink status time out.
The background as below:
I have a custom board with 2 DSP(C6678) and with Hyperlink to connect each other.
My DSP core(0) will periodically(4K to 16KHz) trig DMA write data to other side through Hyperlink and before every time Trig DMA write, DSP core(0) will check the Hyperlink status(0x21400058) and ECC counter(0x2140004C).
At the same time, my PC Host SW will also check the DSP Hypelrink status through SRIO. It's found that when PC Host SW read hyperlink status(0x21400058), the SRIO will report read timeout error.It's also checked that the SRIO read DDR3 address normally.
So I am wondering, Can the Hyperlink status register support multi-host read at the same time?(if so, any document states that?) Any other possible that cause the SRIO read Hypelrink status timeout?
Thanks.