Part Number:AM5726
Hi Champs,
When AM57x communicate DDR3 memory through EMIF at write mode, it usually have Preamble term at DQS signal.
Usually, this Write DQS Preamble term is one cycle. However, is it able to set 1 more cycle Preamble term (total 2cycle) ?
If we have this setting register, please let us know.
Regards,
Kz777