Part Number:TDA2P-ACD
We are using a TDA2P processor and have to react to GPIO interrupts in GPIO module 6 pin 19.
The interrupt is sent to IPU1 M4 which is running at 212 MHz.
Time between interrupts:
First to second interrupt: 46.08 µs
Second to third interrupt: 9.6 µs
Third to fourth interrupt: 46.08 µs
and so on...
Our software is a bare-metal system using CSL functions to configure interrupts and the GPIO module.
For test purposes I created an interrupt handler that sets, clears and then again sets a second GPIO pin. In the main loop I am simply clearing this GPIO pin all the time in an endless loop.
void gpioIsr(void * p) { GPIOPinWrite( SOC_GPIO4_BASE, 0, 1); GPIOPinWrite( SOC_GPIO4_BASE, 0, 0); GPIOPinWrite( SOC_GPIO4_BASE, 0, 1); GPIOPinIntClear(SOC_GPIO6_BASE, GPIO_INT_LINE_1, 19); }
This is the code to configure the GPIO interrupt:
GPIOModuleEnable(SOC_GPIO6_BASE); GPIOPinIntDisable(SOC_GPIO6_BASE, GPIO_INT_LINE_1, 19); CSL_xbarIrqConfigure(IRQ_XBAR_CPU_ID, IRQ_XBAR_INST_NO, IRQ_XBAR_INDEX); Intc_Init(); Intc_IntEnable(51); Intc_IntRegister(51, (IntrFuncPtr)gpioIsr, (void *)0); Intc_IntPrioritySet(51, 1); Intc_SystemEnable(51); GPIOIntTypeSet(SOC_GPIO6_BASE, 19, GPIO_INT_TYPE_RISE_EDGE); GPIOPinIntClear(SOC_GPIO6_BASE, GPIO_INT_LINE_1, 19); GPIOPinIntEnable(SOC_GPIO6_BASE, GPIO_INT_LINE_1, 19);
Setting and clearing a GPIO pin both take about 5 µs.
During time measurements I found out that the time to enter interrupts is quite long. The time from the incoming GPIO interrupt to the rising edge on the GPIO signal I set is about 10 µs. Even if I subtract 5 µs for setting the GPIO it still takes the CPU ~1000 clock cycles to reach the interrupt code.
After the code in the ISR has been executed it also takes about 6 to 10 µs to go back to the main loop. The first interrupt even takes ~35 µs to return to the main loop (maybe caused by caching?).
This timing means that I am missing a lot of interrupts.
This is a trace of the two GPIO signals used for the measurements:
Are these timings reasonable for the used CPU or is there a way to speed-up the interrupt response time?
Are 5 µs a reasonable time to toggle a GPIO pin? Maybe something in the crossbars is not configured correctly yet.
Our required actions in the ISR would be to:
- Set a GPIO pin
- Start a DMA transfer to one SPI channel
Can this be achieved in 9.6 µs? If not could using the PRUs be a solution for this timing requirement?
Many thanks
Sascha Bannier