CCS/OMAPL138B-EP: McBSP EDMA

Part Number:OMAPL138B-EP

Tool/software: Code Composer Studio

Hi

when I read data from McBSP0 and EDMA3 to DDR on OMAPL138(ARM core), the data is right at the first time by triggering EDMA manual(seting the ESR), then the DRR data of McBSP does not update. If I set RRST in SPCR to 0, then to 1, the DDR data updates only once. Actually, the data transported to the DR of McBSP is continous.

Meanwhile, If EDMA3 is not used, and the DRR data is read continuously by CPU, the DRR data updates rightly.

So, what is wrong here? What may cause the DDR data of McBSP doesn't update?

thanks

Qu