Part Number:OMAP-L138
Tool/software: Code Composer Studio
Hi,
I am trying to have my UART initiate transmission after:
- interrupt4, tied with the Audio input, runs 1024 times and increments a volatile global variable each time
- Once this occurs, I have an if statement check if the variable has been incremented to 1024 and then begin transmission
However, although the value of the variable is incremented to 1024 (checked with the memory browser and expressions window in CCS), the if statement in the UARTisr never actually runs. Does anybody have any ideas as to why this may be happening?
Here's a somewhat simplified version of my code for reference.
Potential Issue #1: Two different assembly files dealing with the interrupt vector table. This is from the OMAP-L138 starterware
- the UARTisr is tied to _c674x_mask_int4_isr in this file
; ; File: intvecs.asm ; ; Brief: Contains interrupt vector table and fetch packets ; ; Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ ; ALL RIGHTS RESERVED ;********************************************************** ; Global Symbols ;********************************************************** .global _intcVectorTable .global _c_int00 .global _c674x_nmi_isr .global _c674x_rsvd_int2_isr .global _c674x_rsvd_int3_isr .global _c674x_mask_int4_isr .global _c674x_mask_int5_isr .global _c674x_mask_int6_isr .global _c674x_mask_int7_isr .global _c674x_mask_int8_isr .global _c674x_mask_int9_isr .global _c674x_mask_int10_isr .global _c674x_mask_int11_isr .global _c674x_mask_int12_isr .global _c674x_mask_int13_isr .global _c674x_mask_int14_isr .global _c674x_mask_int15_isr ;********************************************************** ; Interrupt Fetch Packet ;********************************************************** VEC_ENTRY .macro addr STW B0,*--B15 MVKL addr,B0 MVKH addr,B0 B B0 LDW *B15++,B0 NOP 2 NOP NOP .endm ;********************************************************** ; Interrupt Vector Table ;********************************************************** .align 1024 _intcVectorTable: VEC_ENTRY _c_int00 VEC_ENTRY _c674x_nmi_isr VEC_ENTRY _c674x_rsvd_int2_isr VEC_ENTRY _c674x_rsvd_int3_isr VEC_ENTRY _c674x_mask_int4_isr VEC_ENTRY _c674x_mask_int5_isr VEC_ENTRY _c674x_mask_int6_isr VEC_ENTRY _c674x_mask_int7_isr VEC_ENTRY _c674x_mask_int8_isr VEC_ENTRY _c674x_mask_int9_isr VEC_ENTRY _c674x_mask_int10_isr VEC_ENTRY _c674x_mask_int11_isr VEC_ENTRY _c674x_mask_int12_isr VEC_ENTRY _c674x_mask_int13_isr VEC_ENTRY _c674x_mask_int14_isr VEC_ENTRY _c674x_mask_int15_isr
- The McASP interrupt is tied to interrupt4 in this file, this is the vectors_intr.asm from the L138_support file
.global _vectors
.global _c_int00
.global _vector1
.global _vector2
.global _vector3
.global _interrupt4
.global _vector5
.global _vector6
.global _vector7
.global _vector8
.global _vector9
.global _vector10
.global _vector11
.global _vector12
.global _vector13
.global _vector14
.global _vector15
.ref _c_int00 ;entry address
; This is a macro that instantiates one entry in the interrupt service table.
VEC_ENTRY .macro addr
STW B0,*--B15
MVKL addr,B0
MVKH addr,B0
B B0
LDW *B15++,B0
NOP 2
NOP
NOP
.endm
; This is a dummy interrupt service routine used to initialize the IST.
_vec_dummy:
B B3
NOP 5
; This is the actual interrupt service table (IST).
.sect ".vecs"
.align 1024
_vectors:
_vector0: VEC_ENTRY _c_int00 ;RESET
_vector1: VEC_ENTRY _vec_dummy ;NMI
_vector2: VEC_ENTRY _vec_dummy ;RSVD
_vector3: VEC_ENTRY _vec_dummy ;RSVD
_vector4: VEC_ENTRY _interrupt4 ;Interrupt4 ISR
_vector5: VEC_ENTRY _vec_dummy
_vector6: VEC_ENTRY _vec_dummy
_vector7: VEC_ENTRY _vec_dummy
_vector8: VEC_ENTRY _vec_dummy
_vector9: VEC_ENTRY _vec_dummy
_vector10: VEC_ENTRY _vec_dummy
_vector11: VEC_ENTRY _vec_dummy
_vector12: VEC_ENTRY _vec_dummy
_vector13: VEC_ENTRY _vec_dummy
_vector14: VEC_ENTRY _vec_dummy
_vector15: VEC_ENTRY _vec_dummy
;* =============================================================================
;* Automated Revision Information
;* Changed: $Date: 2007-09-11 11:05:40 -0500 (Tue, 11 Sep 2007) $
;* Revision: $Revision: 3960 $
;* =============================================================================
Potential Issue #2: The UARTIsr interrupt handler is actually passed to another function which handles the interrupt's definition. This other function is located in another file and may possibly not be able to read the change in the variable to 1024. I have posted most of the code but not all of it, but I can if needed.
volatile unsigned int index = 0;
int main(void)
{
unsigned int intFlags = 0;
unsigned int config = 0;
memset(lcdkBuffer,0,sizeof(int16_t)*1024);
/* Enabling the PSC for UART2.*/
PSCModuleControl(SOC_PSC_1_REGS, HW_PSC_UART1, PSC_POWERDOMAIN_ALWAYS_ON,
PSC_MDCTL_NEXT_ENABLE);
/* Setup PINMUX */
UARTPinMuxSetup(1, FALSE);
/* Enabling the transmitter and receiver*/
UARTEnable(SOC_UART_1_REGS);
/* 1 stopbit, 8-bit character, no parity */
config = UART_WORDL_8BITS;
/* Configuring the UART parameters*/
UARTConfigSetExpClk(SOC_UART_1_REGS, SOC_UART_1_MODULE_FREQ,
115200, config,
UART_OVER_SAMP_RATE_16);
/* Enabling the FIFO and flushing the Tx and Rx FIFOs.*/
UARTFIFOEnable(SOC_UART_1_REGS);
/* Setting the UART Receiver Trigger Level*/
UARTFIFOLevelSet(SOC_UART_1_REGS, UART_RX_TRIG_LEVEL_1);
/*
** Enable AINTC to handle interrupts. Also enable IRQ interrupt in ARM
** processor.
*/
SetupInt();
/* Configure AINTC to receive and handle UART interrupts. */
ConfigureIntUART();
/* Preparing the 'intFlags' variable to be passed as an argument.*/
intFlags |= (UART_INT_LINE_STAT | \
UART_INT_TX_EMPTY | \
UART_INT_RXDATA_CTI);
/* Enable the Interrupts in UART.*/
UARTIntEnable(SOC_UART_1_REGS, intFlags);
L138_initialise_intr(FS_8000_HZ,ADC_GAIN_0DB,DAC_ATTEN_0DB,LCDK_LINE_INPUT);
while(1);
}
interrupt void interrupt4(void) // interrupt service routine
{
int16_t left_sample, right_sample;
/*-------------This is code for Week 2 Lab----------*/
left_sample = input_left_sample();
/* right_sample = input_right_sample();*/ // For "S" LCDK
/*-------------This is end of code for Week 1 Lab-----------*/
if(index<1024){
lcdkBuffer[index]=left_sample;
index++; //incrementation of index
}
output_left_sample(left_sample); // For "X" LCDK
/* output_right_sample(right_sample);*/ // For "S" LCDK
return;
}
/*
** \brief Interrupt Service Routine(ISR) to be executed on UART interrupts.
** Depending on the source of interrupt, this
** 1> writes to the serial communication console, or
** 2> reads from the serial communication console, or
** 3> reads the byte in RBR if receiver line error has occured.
*/
volatile int somestuff=0;
int slowCount = 0;
void UARTIsr()
{
//static unsigned int length = sizeof(txArray);
//static unsigned int index=0;
static unsigned int count = 0;
unsigned char rxData = 0;
unsigned int int_id = 0;
static unsigned int length = 0;
counter++;
/* This determines the cause of UART2 interrupt.*/
int_id = UARTIntStatus(SOC_UART_1_REGS);
#ifdef _TMS320C6X
// Clear UART2 system interrupt in DSPINTC
IntEventClear(SYS_INT_UART1_INT);
#else
/* Clears the system interrupt status of UART2 in AINTC. */
IntSystemStatusClear(SYS_INT_UARTINT1);
#endif
/* Checked if the cause is transmitter empty condition.*/
if(UART_INTID_TX_EMPTY == int_id)
{
somestuff=40;
if(1023 < index){ //index does get incremented to 1024 but this code never runs
//UARTCharGetNonBlocking(SOC_UART_1_REGS);
if(1==1) {
somestuff=60;
}
UARTCharPutNonBlocking(SOC_UART_1_REGS, 97);
}
if(2 < length)
{
if(0 < count)
{
/* Write a byte into the THR if THR is free. */
// UARTCharPutNonBlocking(SOC_UART_1_REGS, txArray[count]);
UARTCharPutNonBlocking(SOC_UART_1_REGS, buffArr[count-1]);
// length--;
// count++;
//UARTCharPutNonBlocking(SOC_UART_1_REGS, tx_value);
count--;
}
}
// if( 2 <length && 0 == count)
// {
// //count=0;
// //length = sizeof(txArray);
// /* Disable the Transmitter interrupt in UART.*/
// UARTIntDisable(SOC_UART_1_REGS, UART_INT_TX_EMPTY);
// }
}
/* Check if the cause is receiver data condition.*/
if(UART_INTID_RX_DATA == int_id)
{
rxData = UARTCharGetNonBlocking(SOC_UART_1_REGS);
if(buffInd<200)
buffArr[buffInd++]=rxData;
UARTCharPutNonBlocking(SOC_UART_1_REGS, rxData);
length++;
count++;
}
/* Check if the cause is receiver line error condition.*/
if(UART_INTID_RX_LINE_STAT == int_id)
{
while(UARTRxErrorGet(SOC_UART_1_REGS))
{
/* Read a byte from the RBR if RBR has data.*/
UARTCharGetNonBlocking(SOC_UART_1_REGS);
}
}
return;
}/*
** \brief This function confiugres the AINTC to receive UART interrupts.
*/
static void ConfigureIntUART(void)
{
#ifdef _TMS320C6X
//IntRegister(C674X_MASK_INT4, UARTIsr);
IntRegister(C674X_MASK_INT4, UARTIsr); //passes UARTIsr
IntEventMap(C674X_MASK_INT4, SYS_INT_UART1_INT);
IntEnable(C674X_MASK_INT4);
#else
/* Registers the UARTIsr in the Interrupt Vector Table of AINTC. */
IntRegister(SYS_INT_UARTINT1, UART1Isr);
/* Map the channel number 2 of AINTC to UART2 system interrupt. */
IntChannelSet(SYS_INT_UARTINT1, 4);
IntSystemEnable(SYS_INT_UARTINT1);
#endif
}
- I feel like this function may be causing an issue because it passes the UARTIsr to another file - uart.c - and possiby there is some issue with it reading that index becomes 1024
- This function from interrupt.c provides the function getting called in ConfigureIntUART that the UARTIsr function is passed to
/**
* \function IntEnable
*
* \brief This API enables a CPU maskable interrupt.
*
* \param cpuINT - CPU maskable interrupt number
*
* \return None
*/
void IntEnable (unsigned int cpuINT)
{
unsigned int restoreVal;
/* Check the CPU maskable interrupt number */
ASSERT(((cpuINT >= 4) && (cpuINT <= 15)));
/* Disable interrupts */
restoreVal = IntGlobalDisable();
/* Enable CPU maskable interrupt */
IER |= (1 << cpuINT);
/* Restore interrupts */
IntGlobalRestore(restoreVal);
}