Part Number:OMAP-L138
Tool/software: Linux
Hi,
I am working with an OMAP-L138 and have configured it's McASP Rx clock generation circuit to output a bit and frame clock, but have been unable to observe the expected signals. Our setup...
There is an external clock source of 24.576Mhz at the AHCLKR pin. The PFUNC reg is 0x0 so all functions of the McASP are enabled. The PDIR reg is 0xb400.1000 indicating AHCLKR and AHCLKR as inputs and AFSR, ACLKR, AFSX and ACLKX as outputs. The GBLCTL is 0x1f1f indicating everything is out of reset.. The AHCLKRCTL is 0x0 so the HCLKRM is set for the external clock source. The ACLKRCTL reg is 0x1 so a simple div by 2.
We see no output clock or signal activity on the ACLKR pin, according to 25.0.21.2 of the user's manual with these settings we should see a free running clock... correct? Or has something been overlooked?
Thanks in advance, Tom