Part Number:OMAPL138B-EP
Hello,
I am using OMAPL138EZWTA3 device in my current project. I am getting confuse in configuring the McASP transmit clock. I am referring the OMAP L138 Manual " Literature Number: SPRUH77C
April 2013–Revised September 2016". My confusion is, Page 129 says that McASP Clock is derived from sysclk2 either from PLL0 or PPL1 controller, and in same page AUXCLK is not connected to McASP interface.
But Page 139 Shows contradictory information, in this page both reference and module clocks are connected to McASP interface and it also says that internal clock is derived from PLL0_AUXCLK clock source which is too much confusing, I believe we can also generate McASP internal clock from SYSCLK2 as well.
Could you please clarify below mention items. In our design McASP interface is being used only for communicating between two OMAP processors, not used for Audio date transmit purpose.
1. What is PLL0_AUXCLK? is it derived directly from external oscillator connected to Aux processor?
2. Since we are planning to use PLL0_SYSCLK2 for McASP internal clock, what is the configuration we need to follow to to derive ACLKX (25MHz and our external oscillator is also 25Mhz) from PLL0 SYSCLK2?
3. is it necessary to use PLL0_AUXCLK clock for McASP communication (not using audio data).
4. what is the difference between Module clock and TX/RX Reference clock (Figure 7-7 in page 139 of OMAP manual).
Please help me to understand above clarifications.