PRU: signal falls after 10 nanoseconds

void pruInit()
{
// Open Permissions to SYSCFG Registers
CSL_FINS(sysRegs->KICK0R, SYSCFG_KICK0R_KICK0, KICK0_KEY);
CSL_FINS(sysRegs->KICK1R, SYSCFG_KICK1R_KICK1, KICK1_KEY);

//CSL_FINST(sys1Regs->PUPD_SEL, SYSCFG1_PUPD_SEL_PUPDSEL27, PULLUP);

// Configure PRU GPIOs
CSL_FINST(sysRegs->PINMUX15, SYSCFG_PINMUX15_PINMUX15_31_28, PRU0_R30_10);
CSL_FINST(sysRegs->PINMUX15, SYSCFG_PINMUX15_PINMUX15_27_24, PRU0_R30_11);
CSL_FINST(sysRegs->PINMUX15, SYSCFG_PINMUX15_PINMUX15_23_20, PRU0_R30_12);
CSL_FINST(sysRegs->PINMUX15, SYSCFG_PINMUX15_PINMUX15_19_16, PRU0_R30_13);
CSL_FINST(sysRegs->PINMUX15, SYSCFG_PINMUX15_PINMUX15_15_12, PRU0_R30_14);
CSL_FINST(sysRegs->PINMUX15, SYSCFG_PINMUX15_PINMUX15_11_8, PRU0_R30_15);
/*
CSL_FINST(sysRegs->PINMUX11, SYSCFG_PINMUX11_PINMUX11_11_8, PRU0_R30_21);
CSL_FINST(sysRegs->PINMUX18, SYSCFG_PINMUX18_PINMUX18_19_16, PRU0_R30_23);
CSL_FINST(sysRegs->PINMUX13, SYSCFG_PINMUX13_PINMUX13_19_16, PRU0_R30_29);
CSL_FINST(sysRegs->PINMUX13, SYSCFG_PINMUX13_PINMUX13_23_20, PRU0_R30_28);
CSL_FINST(sysRegs->PINMUX13, SYSCFG_PINMUX13_PINMUX13_27_24, PRU0_R30_27);
CSL_FINST(sysRegs->PINMUX13, SYSCFG_PINMUX13_PINMUX13_31_28, PRU0_R30_26);
*/

// Close Permissions to SYSCFG Registers
CSL_FINS(sysRegs->KICK0R, SYSCFG_KICK0R_KICK0, KICK_LOCK);

PRU_disable();
PRU_load(PRU_NUM, (Uint32*)PRUCode, (sizeof(PRUCode)/sizeof(Uint32)));
CSL_FINST(hPru->CONTROL, PRUCORE_CONTROL_COUNTENABLE, ENABLE);
}

void pruRun()
{
CSL_FINST(hPru->CONTROL, PRUCORE_CONTROL_ENABLE, ENABLE);
PRU_waitForHalt(PRU_NUM, -1);
hPru->CONTROL = CSL_PRUCORE_CONTROL_RESETVAL;
}

PRU hasm file:

#ifndef _PRU_GPIOTOGGLE_HP_
#define _PRU_GPIOTOGGLE_HP_

#define TICK 525
#define TICK_8 TICK * 8
#define START_ADC_TICK 50

#define START_ADC 10
#define VVR 11
#define CLK 12
#define RES 13
#define VDR 14
#define VSH 15

//#define START_ADC 21
//#define VVR 29
//#define VSH 28
//#define VDR 27
//#define RES 26
//#define CLK 23

.macro gpioSet
.mparam bitNum
SET r30, r30, bitNum
.endm

.macro gpioClr
.mparam bitNum
CLR r30, r30, bitNum
.endm

.macro delay
.mparam ticks
MOV r0, ticks
CALL DELAY
.endm

.macro clkTick
gpioClr CLK
delay TICK
gpioSet CLK
delay TICK * 3
.endm

.macro clkTickStartADC
gpioClr CLK
gpioSet START_ADC
delay START_ADC_TICK
gpioClr START_ADC
delay TICK - START_ADC_TICK
gpioSet CLK
delay TICK * 3
clkTick
.endm

#endif // _PRU_GPIOTOGGLE_HP_

PRU asm file: 

.origin 0
.entrypoint PRUCODE

#include "prucode.hasm"

PRUCODE:
// tick 0
CALL INIT
delay TICK * 2
gpioSet RES
delay TICK * 6
// tick 1
gpioSet VVR
gpioSet VDR
delay TICK_8
// tick 2
gpioClr VVR
delay TICK_8
// tick 3
clkTick
clkTick
// tick 4
MOV r1, 128
TICK4:
SUB r1, r1, 1
clkTickStartADC
QBGE TICK4, r1, 117
// tick 15
gpioClr VDR
TICK15:
SUB r1, r1, 1
clkTickStartADC
QBNE TICK15, r1, 0
// tick 131
gpioSet START_ADC
delay START_ADC_TICK
gpioClr START_ADC
delay TICK - START_ADC_TICK
delay TICK_8
// tick 132
delay TICK_8
// tick 133
gpioSet VSH
delay TICK * 4
gpioClr VSH
delay TICK * 4
HALT

INIT:
gpioClr START_ADC
gpioClr VVR
gpioClr VDR
gpioClr VSH
gpioClr RES
RET

DELAY:
SUB r0, r0, 1
QBNE DELAY, r0, 0
RET

Best regards,
Vitaly