Part Number:OMAPL138B-EP
Hi,
I'm trying to test McBSP driver on OMAPL138 Soc in Linux environment. I tried Playback and Capture of a .wav file in "Digital Loop Back" mode, but it is getting failed during playback due to the occurrence of XSYNCERR even if I clear this bit before enabling the transmitter. I have selected frame sync to be occurred on every DXR-to-XSR copy by resetting the FSGM bit in SRGR register to zero(0). And the clock settings are:
/* Setting frame rate and clock rate */
bit_per_frame = 16;
bit_rate = bit_per_frame * frm_rate;
clk_div =150000000 / bit_rate;
SRGR [CLKGDV] = clk_div - 1;
I have also tried with the value as:
clk_div = 16000000 / bit_rate;
Following are the McBSP register configurations(During aplay):
[Before enabling the transmitter.]
content of SPCR : 0x8000
content of RCR : 0x10000 [0x80410040 (When both aplay and arecord are ran)]
content of XCR : 0x80410040
content of PCR : 0xf03
content of SRGR : 0x20200051
[After enabling the transmitter.]
content of SPCR : 0xcd8000
content of RCR : 0x10000 [0x80410040 (When both aplay and arecord are ran)]
content of XCR : 0x80410040
content of PCR : 0xf03
content of SRGR : 0x20200051
And following are the register contents of EDMA (which is from Linux source code).
SH_ER0 00000000
SH_ECR0 00000000
SH_ESR0 00000000
SH_CER0 00000000
SH_EER0 00000008
SH_EECR0 00000000
SH_EESR0 00000000
SH_SER0 00000000
SH_SECR0 00000000
SH_IER0 00000008
SH_IECR0 00000000
SH_IESR0 00000000
SH_IPR0 00000000
SH_ICR0 00000000
SH_IEVAL0 00000000
Can anybody please tell me where am I going wrong?