This is for a legacy product with DSP/ BIOS
I have three DSPs, master and 2 slaves. When the ISR for the master side interrupts to accept a buffer of audio samples, in the beginning of the ISR I strobe the slaves to let them know an audio block is starting so they can align their sampling window. Generally this works.
I now have a process running in a background thread. It doesn't run all the time, basically buckets up a bunch of samples then processed them. Inside the ISR, I'm measuring from the time the receive interrupt is triggered to the time the slaves see the interrupt.
- On times when the lower priority thread does not run, I measure about 3.10uS.
- On times when the lower priority thread does run, I measure 3.20uS.
The master uses Gpio_setPinRal () call under DSP/ BIOS
Bottom line, what would cause an added latency of 0.1uS in an ISR with and without a background task. The ISR should preempt the task right?
I added a dummy process so the background is always busy and timing is now consistantly 3.20uS and seems to work. I'm sure there is a more elegant solution.
Appreciate any help or thoughts,