OMAP-L138 Power on sequence at 456MHz operation

Hi,

My customer use OMAP-L138 with 456MHz operation.
They have a question about power-on sequence.

"6.3.1 Power-On Sequence" in DataSheet says following:
"2. Core logic supplies: (a) All variable 1.3V - 1.0V core logic supplies (CVDD)
                                           (b) All static core logic supplies (RVDD, PLL0_VDDA, PLL1_VDDA, USB_CVDD, SATA_VDD). "

About this sentence,
which one should be powered-on earlier 2(a) or 2(b) ?
If 2(a) and 2(b) should be powered-on as much same time as possible, 
how long time-lag is there allowed?

Best Regards,
Miyashiro