Hi,
Fortunately, I'm able to get datas from the EMIFA interface with the EDMA3 controller in my OMAPL138 processor to an internal buffer. But I recognised that the order of the Bytes isn't correct. After data transfer, the upper byte of EMIFA is the lower byte in my buffer and the lower byte from EMIFA is going to the upper byte in my buffer.
What can I do to change this? Is there any configuration in the EDMA3 system to change this order?
Another challenge is that i can see sometimes that the EDMA3 controller transfers only 1byte instead of the 2x2byte. In my system i have to transfer 8 times 2x16bit. The sourceaddress of each 16 bit is diffrent, therefore i using the AB-synchronized transfer model. I have an PaRAM set for each transfer, that means 8 PaRAM-sets and they are linked to a linked list, so that the EDMA3 controller transfers at each event 2x16bit from EMIFA to my Buffer. Every PaRAM set has its own memory location in the buffer.
I observed one time, that the CS on the EMIFA wasn't always going low for 2 times every event, so I checked the buffer with the debugger and saw that exactly always at the same transfer / PaRAM-set the transfered datas are not correct. only one byte instead of 4 was transfered. I could find any reason for this, and it was also working before this issue. I changed the memorylocation from 0x01C04700 of the PaRAM set to another one 0x01C014E0 and its working now.
Has anybody an explanation for this?
Thanks a lot.
Christian