Following my previous thread 
I tried disabling the cache on both the DSP and the ARM. I have succesfully been able to disable the ARM cache by using the Cp15 source code from the starterware. I have and application that runs on both side of the omapl137 (DSP and ARM). The ARM generates some data, uses CSL_FINST(sysRegs->CHIPSIG, SYSCFG_CHIPSIG_CHIPSIG2, ASSERT); to let the DSP know the data is ready. This data is in a shared location in external memory.
My application works as expected if I use shared ram instead of the external SDRAM and while doing the appropriate cache maintenance but during overnight test I have some issue which I would like to root cause. One of the first thing I would like to do is disable caching everywhere in my code. Basically remove all the cache wb and inv. Like I mention before, disabling cache in the ARM, just the ARM, was simple and the application continued to work. As soon as attempt to disable on the DSP I ran into some issues. It seems like the share, none cache region is being read accordingly but one of my task is not. I cannot hit a breakpoint inside of it.
Kind of hard to explain but I will do my best:
1- once the arm generates some data it signal the dsp
2- the interrupt is received
3- there is a task that will grab the data modulate it and transmit it through the MCASP
4- this task operates correctly while the interrupt is not generated, I can put a breakpoint and stop the code
5- as soon as the interrupt arrives, on the DSP, #1, the previous task will no longer another breakpoint in the same task
Here is a snippet:
and in my task I have the following:
as you can see the interrupt changes the global variable pcktrdy to 1 and the code shoul jump to the else and do its thing (its thing is using the DSPlib for the C64). As soon as I disable caching this does not occur.
How do I disable caching?
1- in the custom platform I'm setting L2, L1D and L1P to 0K
2- disable cache on the app.cfg module
3- remove any cache headers from my code
4- I have also tried leaving L2 enable and changing the MAR bits in the app.cfg.
My shared data is in 0xC0000000 and the code and data starts at 0xC3000000.
Any help would be appreciated.