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DDR data getting corrupted when DDR is accessed insted of SRAM by UPP at 75MHz

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Hi All, 

For OMAPL138 we have build an UPP driver for ARM accessing DDR for UPP operation with UPP at 75MHZ ..

The below is the mentioned setup :-

A) The UPP uses the below mentioned variables for its operation for DDR:-

      #define UPP_SOURCE             0xC6000000
      #define UPP_DESTINATION    0xC6032000

      and 

      #define UPP_SOURCE              0x11801000
      #define UPP_DESTINATION     0x11813C20    in case  operations is on SRAM 

B)The application continuously calls an read and write function w.r.t UPP data transfer from DDR2/SRAM to    

     FPGA.

C) Now since it is in continuous while(1) loop , if i execute any other command from ARM the UPP buffer is getting

     corrupted . Whereas if i use SRAM , i can easily perform other operations very easily.

     So keeping all setup exactly same :-

     i) UPP accessing DDR + any other command [even console based command like CLEAR , ls , pwd]

         => Data Corruption

     ii) UPP accessing DDR + any other command [even console based command like CLEAR , ls , pwd]

         => No Data Corruption

      

Can any one please help to find the area where i should look to solve this issue , as i am to totally clueless as to cause of this behavior. 

Following is related info which i can share which may provide some additional inputs :-

a) The application is calling an ioctl call to get the service for read -write operation from driver

b) In case of DDR if i put an sleep of around 1 sec before every operation , the issue in not seen

Can any one please provide some inputs ...

Thank You,

Ashish Mishra

[Banglore / India ] 


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