All:
I have been successful in loading ARM code from NAND flash (into 0x80000000 range) and once completing work with ARM, I can then load the DSP code from NAND flash (block 6) into DDR memory. However, I would like to know what it takes to load the DSP code from NAND flash into the DSP L2RAM range.
Does it take a different AIS configuration? (It would appear the answer is definitely yes.)
Are there specific settings to be able to enable L2RAM? (Like power settings, etc.)
If someone has done this already using the UART boot mechanism, then I should be able to transition to the CCS mechanism.
Thanks.