I have read through the material on the UART in the Technical Reference, and find it unclear exactly how to put together a "bullet proof" interrupt service routine...there does not seem to be any clear guidance on this issue. I will be using the FIFO but not the EDMA.
When the interrupt occurs, it could be from FIFO reaching receive trigger level, or THRE, or receiver line status errors (OE, PE, FE, BI). I would think the first thing to do is to read the IIR register to see what caused the interrupt (but sometimes more than one cause will be active, or another may occur while the interrupt service routine is executing). Suppose there is a parity error and also THRE condition. When I read the IIR, it also clears the THRE interrupt. But since the line error has higher priority, that is what I will see in the INTID. How will I ever know that the THRE condition also exists? Maybe it is still set in the LSR?
Also...when should I clear the flag in the event manager? After all the interrupting sources have been handled from the device? I want to be sure there is no risk that an interrupt will be missed because of an event occurring at the wrong time in my sequence of instructions.
I know there are some examples in the starterware code and the PSP code, but they are not helpful in answering these questions. For some of the other peripherals there were clear descriptions of what needed to be in the interrupt service routine and I would much appreciate the same for the UART
Thanks