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Incorrect Direct Memory Access while OMAPL138 ARM Core runs RTOS

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Hello OMAPL138 IPC RTOS or MMU experts,

To have IPC feature running on OMAPL138LCDK, I allocated memory address 0xC0000000 to 0xC0000100 for semaphore flags and for passing data between ARM and DSP cores, and IPC worked just fine.  However, when I started to use RTOS (with MMU enabled), I have following issue on CCSv5.5 debugger:

While debugging on ARM core under ‘CPU Memory View’ mode, only DSP core has correct access (read/write) to memory (0xC0000000 to 0xC0000100 for example).

While debugging on ARM core under ‘Physical Memory View’ mode, only ARM core has correct access to the same memory.

While debugging on DSP core, only DSP core has correct access to the same memory.

 

It seems to me ARM and DSP cores cannot work properly simultaneously, once RTOS runs on the ARM core (with MMU enabled).  Is there a way to get around this issue?  Or I have missed any thing here?  IPC supposes to work like before, when there was no RTOS, right?

Thank you!

YeuShyr


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