I'm reading the documentation before I start writing code and I'm not sure about something.
http://www.ti.com/lit/ug/sprufm1/sprufm1.pdf
For transmit operations through the DMA port, the DMA/CPU should write to the same XBUF DMA port
address to service all of the active transmit serializers. In addition, the DMA/CPU should write to the XBUF
for all active transmit serializers in incremental (although not necessarily consecutive) order. For example,
if serializers 0, 4, 5, and 7 are set up as active transmitters, the DMA/CPU should write to the XBUF DMA
port address four times with data for serializers 0, 4, 5, and 7 upon each transmit data ready event. This
exact servicing order must be followed so that data appears in the appropriate serializers.
Does that mean that for a OMAP-L137 I write to address 0x01D0 6000 (www.ti.com/.../omap-l137.pdf page 24 also page 120) four times? Or do I need to write to address 0x01D0 6000 + what ever offset my XBUF RBUF lands on? If the first one is true, I should what tells me when to write each of the four times. Figure 27 of sprufm1 implies that you get one EVT per time lost for all serializers which contradicts the first statement where it seems to imply you get as many EVT as active serializer.
Second question:
I cannot figure out the difference of
WNUMEVT Write word count per DMA event (32-bit). When the Write FIFO has space for at least WNUMEVT
words of data, then an AXEVT (transmit DMA event) is generated to the host/DMA controller. This
value should be set to a non-zero integer multiple of the number of serializers enabled as
transmitters. This value must be set prior to enabling the Write FIFO.
This kind of implies, in my case, this value could be 1, 2, 3,.... since I only have one transmit serializer active. For the EVMOMAP137, BUF5 is the pne to transmit for the AIC3106.
It feels like AXEVT and "transmit DMA event from the McASP" are different things. So I can write 16 samples to 0x01D0 6000 and the FIFO will move one at time to the serializer and at some point I will get a notification that there is space for 16 more. Is this assumption correct? If that is true how to you write 16 samples to this address?
WNUMDMA Write word count per transfer (32-bit words). Upon a transmit DMA event from the McASP, WNUMDMA words are transferred from the Write FIFO to the McASP. This value must equal the number of McASP serializers used as transmitters. This value must be set prior to enabling the Write FIFO.
Last, what is the size of the AFIFO?