We're trying to get UPP to work transmitting data from the ARM core to an FPGA.
We've followed the set up based on the sprugj5b datasheet, and can send 7Mb blocks over, with a data rate of around 120MB/s, however we are getting overflow/underrun errors showing in the UPIER register.
Analysis shows that the only way to fix this is to create an interrupt handler for UPIER (as per section 2.6.4 in the datasheet) and force a short delay in the EOL / EOW events via a tight loop, along the lines of:
if (interrupt_status.EOWQ) {
UPIER.EOWQ = 1;
for (volatile v=0; v<10000; ++v) ;
}
This seems rather brute force, and slows down the data rate significantly. We're also forced to determine a suitable delay length by trial and error:
Do you know the ARM->UPP transfer rate can be run successfully at 120MB/s?
Is there a better way to determine how long to delay in the interrupt handler, ie should we be waiting for another signal to clear, something like:
if (interrupt_status.EOWQ) {
UPIER.EOWQ = 1;
while (<some signal>) ;
}
?