OMAP L138 configure Memory Protection Unity over Linux

Hi,

I am trying to configure MPU2 of OMAP L138 on Linux.

My board have 128 MB of DDR (0xC000 0000 - 0xC800 0000) and as a first test I am try to insert a rule to protect  (0xD0000000 - 0xDFFF0000)

I made a small driver to write the values to the registers of MPU2 (thats protect the DDR) that is in the end of the post.

I have followed a similar topic [1] and I am writing in the same registers with values modified for my board.

It appears when I try to write to protected memory area the interrupt triggers, but the fault registers are always the same, and I can't clear them:

0x01e15300 FLTADDRR 0x00000100
0x01e15304 FLTSTAT 0x00010084
0x01e15308 FLTCLR 0x00000000

Any idea what problem can be ?

Thanks

[1] - http://e2e.ti.com/support/dsp/omap_applications_processors/f/42/t/158135.aspx#592970

Regards,
Aníbal

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#include <linux/init.h>
#include <linux/module.h>
#include <linux/moduleparam.h>

#include <asm/io.h>

#define MPU2_BASE         0x01E15000
#define MPU2_CFG          0x04
#define MPU2_IENSTAT      0x14
#define MPU2_IENSET       0x18
#define MPU2_PROG1_MPSAR  0x0200
#define MPU2_PROG1_MPEAR  0x0204
#define MPU2_PROG1_MPPA   0x0208
#define MPU2_FLTCLR       0x0308

int __init mpu_cfg_init(void) {

    void __iomem *mpu_base;
    printk(KERN_ALERT "Hello, world\n");

    mpu_base = ioremap(MPU2_BASE, SZ_4K);

    if(mpu_base == NULL){
        printk(KERN_ALERT "mpu_cfg_init: can't alloc memory. Abort");
        return 1;
    }

    // Disable accsess from everyone to part of ddr
    iowrite32(0xD0000000, mpu_base + MPU2_PROG1_MPSAR);
    printk("mpu_cfg_init: MPU2_PROG1_MPSAR  0xD0000000: 0x%08x\n",
        ioread32(mpu_base + MPU2_PROG1_MPSAR));

    iowrite32(0xDFFF0000, mpu_base + MPU2_PROG1_MPEAR);
    printk("mpu_cfg_init: MPU2_PROG1_MPEAR 0xDFFF0000 0x%08x\n",
        ioread32(mpu_base + MPU2_PROG1_MPEAR));

        iowrite32(0x03FFFEC0, mpu_base + MPU2_PROG1_MPPA);
    printk("mpu_cfg_init: MPU2_PROG1_MPPA 0x03FFFEC0: 0x%08x\n",
        ioread32(mpu_base + MPU2_PROG1_MPPA));

    // clean fault registers
    iowrite32(0x01, mpu_base + MPU2_FLTCLR);
    printk("mpu_cfg_init: MPU2_FLTCLR 0x03: 0x%08x\n",
            ioread32(mpu_base + MPU2_FLTCLR));

    // clean old interrupts
    iowrite32(0x03, mpu_base + MPU2_IENSTAT);
    printk("mpu_cfg_init: MPU2_IENSTAT 0x03: 0x%08x\n",
        ioread32(mpu_base + MPU2_IENSTAT));

    // enable interrupts
        iowrite32(0x03, mpu_base + MPU2_IENSET);
    printk("mpu_cfg_init: MPU2_IENSET 0x03: 0x%08x\n",
        ioread32(mpu_base + MPU2_IENSET));


    iounmap(mpu_base);

    return 0;
}

void __exit mpu_cfg_cleanup(void) {
    
    printk(KERN_ALERT "Goodbye, cruel world\n");

    return;
}

module_init(mpu_cfg_init);
module_exit(mpu_cfg_cleanup);